[NUCLEO-N657X0-Q] ETH1 MAC/DMA not receiving packets & Memory Management Tool problems

[damole]

Hello STM32 Community,

I am developing a system on the NUCLEO-N657X0-Q using ThreadX and NetX Duo and I am having a hard time to make the ethernet work. I want to implement a web server in my system but I cannot make the Ethernet communicate.

Problem:
I am unable to receive or transmit any Ethernet frames. The PHY link establishes successfully (from what I see on my linux terminal, autonegotiation completes, Link is UP, and the LEDs on the plug turns on normally), but pinging the Nucleo's static IP yields no response. Wireshark shows no ARP or ICMP packets originating from the Nucleo.

Trying to debug, I see that the the MAC/DMA interrupt `ETH1_IRQHandler` is never triggered by incoming network traffic. It fires exactly twice during the initial board boot sequence(where, for what I understand, some DMA errors flag are raised), but remains completely silent afterward. From the logs that I send to the serial port it appears that from the NetXDuo point of view is everything fine.

The D-cache is disabled and for now I want to keep it disabled, because activating it breaks other parts of my project (I see that in the examples the Dcache is enabled, but I guess is only matters of performance, not mandatory, right?).
Among various attempts, I was also trying to use the Memory Management Tool to move the RAM and FLASH regions in order to assign explicitly regions for the Ethernet descriptors. However, The Tool does not let me move these regions (my project is in XiP mode, if it matters).

I have then some questions about these two related issues:

A) Ethernet and NetX Duo Initialization
1. Am I missing some software initialization step, or misconfiguring the hardware in some way? I went through many examples and I do not find an answer, also given that the configuration sometimes differ among them.

B) Memory Management Tool (XiP Mode)
2. Assuming explicit descriptor placement is necessary for a fix, what is the procedure to unlock, and modify the default memory regions within the STM32CubeMX Memory Management Tool, so that I can define custom memory segments?

Any guidance on resolving the MAC silence or navigating the memory configuration tool would be highly appreciated. Thank you. I attach a .zip file with all the code and the .ioc file.

[STackPointer64]

Hello @damole,

I suggest that you check the examples in the STM32CubeN6 GitHub repository, which may help you with the available configuration, descriptor placement, and necessary code modifications. There is also a web server example for the STM32N6570-DK that you can review:

• NUCLEO-N657X0-Q/Applications/NetXDuo/Nx_TCP_Echo_Server
• STM32N6570-DK/Applications/NetXDuo/Nx_WebServer

Best regards,

[damole]

Hello @STackPointer64,

thanks for the reply. As I mentioned, I already checked these examples and also oters, but my configuration seems consistent to what I found in the examples. I also tried to follow this example, structuring the code in a similar way, but the issue is not solved.

[STackPointer64]

I see. Before going too deep into debugging, have you tried running an example from the repository and testing whether you can ping it? This will help ensure that you do not have any hardware issues. The guide you mentioned might not work on STM32N6 out of the box, because its architecture differs from H7, and the descriptors need to be placed elsewhere.

[ACR]

Hello @damole ,

 

I am wondering if you get any further now, because I am facing a similar issue.

 

Best regards, 

[damole]

Hello @ACR,

Unfortunately I am not going any further in solving this issue. I saw your post before, and also some other related to a similar problem, but i still cannot find a solution.
However, I see from your post that you can assign the ethernet descriptors region in the Memory Management Tool. For me I was not able to assign them becasue i was not able to move the ram and the flash regions (and the descriptors must be placed in the address space occupied by the ram region). Did you find a workaround for this or am I just doing something wrong (I know that i need to activate the flag in Code Generation Configuration, but I am not able to move the regions anyway)? This would be of some help for me, thanks

Best regards

[ACR]

Hello @damole ,

 

By using the MMT I could generate a new linker script, with defined Section for both descriptors. 

I am not sure about what the MMT does, I mean there are several options (cacheability, shareability,...) like below: 

 

It seems that these have no effects, I couldn't find any changes in the generated code. There is also the MPU, where you can find this parameters. 

 

But implementing this didn't resolve my problem.

 

>and the descriptors must be placed in the address space occupied by the ram region

I don't get this point, but I saw something like that in the NX TCP ECHO Client example, where the descriptors were defined in the RAM defined memory. I didn't try. 

 

Best regards,