DAC: maximum output voltage = 1 / 2 VDDA

[GChri.2]

Hi, 

 

I'm using a STM32F072's DAC to output a SIN and a COS wave. The problem is I can only output values up to approx. VDDA / 2. The DAC drives unity gain amplifiers to drive a 50 Ohm load. The DAC is connected directly to the amps, using the buffer does not help. VDDA = 3.3 V. 

Here, CH4 is connected directly to the DAC output via a 10:1 probe. The black things on the scope inputs are 50 Ohm termination, so the CH2 and CH3 signals having only half the amplitude of CH4 is expected. All channels are DC coupled.

 I'm writing to the DAC using the DHR12L1/2 registers (using the STM32Cube HAL): 

uint16_t value = (uint16_t) (ltbDacSinLut(ltb_dac_ch1_counter_) ^ 0x8000) & 0xFFF0;
HAL_DAC_SetValue(&hdac, DAC_CHANNEL_1, DAC_ALIGN_12B_L, (uint32_t)value);

where ltbDacSinLut returns values in the range of [-32768, 32767].

 

 

Dividing the value by 2 before writing to the DAC results in undistorted SIN / COS output, but of course the output swing is then limited to ~1.6 V. 

[TDK]

Can you show the circuit for the unity gain amplifiers? I'd measure the voltage upstream of those to eliminate that as the problem. Put out a DC value and verify with multimeter. Or the oscilloscope if convenient.

 

[GChri.2]

 

 

 

CH4 was connected to the "uC_DAC0" net, directly at the F072's output. The trace is less than 10mm long. 

[MasterT]

LMV342 is not specified to drive 50 Ohm load. DS says 2-10 kOhm

[Peter BENSCH]

Your DAC data formatting is likely wrong: you are writing a 12-bit left-aligned value using DAC_ALIGN_12B_L, but your code only prepares a shifted 16-bit style value: you appear to be generating a sine wave with values from [-32768, 32767], converting it to offset-binary representation using ^0x8000, and then masking it with 0xfff0. That is not the correct scaling for a 12-bit DAC. The DAC may therefore be receiving an effective waveform centred around mid-scale and not using the full range correctly.

Use a proper unsigned 12-bit DAC code in the range 0..4095 for HAL_DAC_SetValue(..., DAC_ALIGN_12B_R, ...), or if you keep left alignment, make sure the value is shifted to match the DAC’s expected left-aligned format.

Also, the STM32F0 DAC can only swing from ~0V to ~VDDA. If you generate a sine directly in the DAC, a centred waveform must be biased at mid-scale.

Regards
/Peter

[GChri.2]

Hi, 

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@Peter BENSCH wrote:

you are writing a 12-bit left-aligned value using DAC_ALIGN_12B_L, but your code only prepares a shifted 16-bit style value: you appear to be generating a sine wave with values from [-32768, 32767], converting it to offset-binary representation using ^0x8000, and then masking it with 0xfff0. 

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correct. this generates a bit pattern that the DHR12L1/2 registers expect: 

 

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@Peter BENSCH wrote:

The DAC may therefore be receiving an effective waveform centred around mid-scale and not using the full range correctly.

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This is intentional. Since the DAC cannot output negative voltages, the mean of the SIN must bei at VDD / 2, if the full range is to be used. 

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@Peter BENSCH wrote:

or if you keep left alignment, make sure the value is shifted to match the DAC’s expected left-aligned format.

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I checked with the debugger, the values range from 0 to 65520, which is the correct range for a left aligned 12-bit value with the lower 4 bits cleared. 

Dividing the value by 2 creates a perfect SIN wave centered around VDD / 2. 

[TDK]

Op amp specifies typical 7 mV from rail at 10 kOhm load, and 32 mV from rail at 2 kOhm load. Extrapolate that down to 50 Ohm (or 100?) load--much higher. That's likely where your issue is. Everything else seems okay. Remove the load and it pro

Good spot by @MasterT 

 

Not really half VDDA, just kinda close. 54%. Just coincidence. If it were exactly have then scaling issues would be likely.

 

[Ozone]

Considering clipped output, I would suspect the DAC values as problem, as poster @Peter BENSCH .

To make sure, I would suggest to check the DAC output (= opamp input) with a scope, on the MCU pin.