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waclawek.jan
waclawek.jan
Super User
June 9, 2025
Solved

STM32F407 VDDA-VREF+ difference

  • June 9, 2025
  • 3 replies
  • 587 views

In the STM32F407 DS, ADC characteristics table has the following footnotes:

waclawekjan_0-1749462029823.png

IMO 2. follows from 3. (which is a more stringent requirement); thus 2. is redundant and confusing.

JW

    Best answer by mƎALLEm

    Hello,

    Note 2, is related to the power-up phase while note 3 is related to the functional mode when the ADC is running.

    So note 2 will be updated to mention that difference.

    The proposed change:

    2. When VDDA and VREF+ are supplied by independent voltage sources, during power-up phase, it is recommended to maintain the difference between VDDA and VREF+ below 1.8V.

    3 replies

    mƎALLEm
    mƎALLEm
    Technical Moderator
    June 9, 2025

    Hello,

    This will be escalated internally for analysis and fix. Internal ticket number: 211812.

    Thank you.

    "To give better visibility on the answered topics, please click on ""Accept as Solution"" on the reply which solved your issue or answered your question."
      mƎALLEm
      mƎALLEmBest answer
      Technical Moderator
      June 17, 2025

      Hello,

      Note 2, is related to the power-up phase while note 3 is related to the functional mode when the ADC is running.

      So note 2 will be updated to mention that difference.

      The proposed change:

      2. When VDDA and VREF+ are supplied by independent voltage sources, during power-up phase, it is recommended to maintain the difference between VDDA and VREF+ below 1.8V.

      "To give better visibility on the answered topics, please click on ""Accept as Solution"" on the reply which solved your issue or answered your question."
        waclawek.jan
        waclawek.janAuthor
        Super User
        June 18, 2025

        Thanks for the clarification.

        JW

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