STM32N6570-DK – LTDC display glitches only when NPU (X-CUBE-AI) is running
- February 24, 2026
- 3 replies
- 218 views
Hello ST community,
I am working on an application on STM32N6570-DK using the camera to detect humans with an AI model (X-CUBE-AI + NPU) and draw bounding boxes on the LCD using LTDC.
I am facing a display corruption / glitch issue that only appears under very specific conditions, and I strongly suspect an AXI / interconnect / NPU side effect, possibly related to an undocumented reset or QoS state.
Project architecture:
Camera -> DCMIPP -> PIPE1 -> BUFFER1 -> LTDC_L1
-> PIPE2 -> BUFFER2 -> NPU -> Config ROI of DCMIPP
Memory placement:
LTDC framebuffer: AXIRAM2
AI input/output buffers: AXIRAM5
No buffer sharing between LTDC and AI
Problem description:
When MX_X_CUBE_AI_Process() is commented, the camera preview is perfectly stable on the LCD.
When MX_X_CUBE_AI_Process() is enabled, continuous display glitches appear (tearing / corrupted lines).
The issue happens only when LTDC is fetching the framebuffer while the NPU is running.
The camera can be fully desynchronized (snapshot mode, manual triggering), the issue still happens.
If I start one debug session (SWD):
The application runs perfectly
No display glitches at all
Even after:
leaving debug mode
software reset
The system keeps working until power is removed
After a power cycle, the issue reappears.
Questions:
Does the NPU act as a high-priority AXI master that can starve LTDC fetches?
Are there AXI QoS / arbitration / FIFO states that are:
modified during debug attach
not reset by software reset
not configurable from CubeMX / HAL?
Is there a known erratum or recommended initialization sequence when using LTDC + NPU concurrently?
Is there a way to force a full AXI / interconnect reset or re-arbitration from software?
Are there debug-related side effects (AXI flush, FIFO clear, QoS rebalance) documented somewhere?
Thank you in advance.
