Hello, @Rohit007
Apologies for the inconvenience regarding the baud rate.
As a first point, I want to clarify that if you are using a 40 MHz clock, the maximum theoretical throughput achievable is 5 Mbps with an oversampling of 8 bits. The 8 Mbps throughput is achievable only if you use a 64 MHz clock and 8-bit oversampling, as stated in the referance manual page 1003.
However, this baud rate can be limited by the maximum frequency of the GPIO pins being used, which I suspect is one of the root causes to your issue. You need to verify whether the pins you are using can handle the desired frequency that you want to achieve.
For the warning sign, Due to the limited resolution of the USARTDIV register, the actual baud rate generated by the USART may not exactly match the desired baud rate calculated from the clock and prescalers. Table 189 of the referance manual details how USARTDIV is encoded, and the maximum allowable baud rate error tolerance. If the difference between the desired and actual baud rate exceeds these limits, a warning or error is triggered to indicate potential communication issues.
Based on testing conducted on the G0 product, the transmission was capped at 2.25 Mbps with correct data transmission. At 2.5 Mbps, scrambled data was observed, indicating unequal baud rates. This reinforces the conclusion that the issue is caused by exceeding the tolerated error rate.

To conclude, first please verify that your pins can reach your desired baud rate frequency. Second, verify that you are respecting the tolerated error in baudrate(especially since you are using an HSI clock which will augment this error as @Andrew Neil, clock may have an effect, please consider using an HSE)
you can calculate it using the BRR register (referance manual page 1051) that you can access using SFR in debug session
Hope that helps
Gyessine