STM32 MCUs Products

Hello.Is it possible to reset the product state from closed to openinternaly by the firmware on a STM32H563?Can i do this easy by rewriting the ProductState to 0xED, or do i need additional provision information or the provisioning password to do this? I don't want to kill my stm32-board, if i rewrite the product state and there is no way to do a Regression with STM32CubeProgrammer after this.. FLASH_OBProgramInitTypeDef OB; HAL_FLASHEx_OBGetConfig(&OB); HAL_FLASH_Unlock(); HAL_FLASH_OB_Unlock(); OB.ProductState = OB_PROD_STATE_OPEN; if ( HAL_FLASHEx_OBProgram(&OB) != HAL_OK ) { HAL_FLASH_OB_Lock(); HAL_FLASH_Lock(); return HAL_ERROR; } HAL_FLASH_OB_Launch(); HAL_FLASH_OB_Lock(); HAL_FLASH_Lock();     

 Besides, I don't know whether this configuration of MX is correct. /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_GPDMA1_Init(); MX_SPI2_Init(); MX_ICACHE_Init(); MX_I2C1_Init(); MX_RTC_Init(); /* USER CODE BEGIN 2 */ HAL_I2C_MspInit(&hi2c1); HAL_SPI_MspInit(&hspi2);

The STM32H743 datasheet section 3.3.2 states that the TCM memories are zero wait state, implying that they run at the core speed of up to 480MHz.  It does not make any claim about the rest of the SRAM.  Figure 2 in the datasheet shows all the AXI and AHB buses running at 240MHz.The reference manual RM0433 figure 49 also shows the AXI and AHBs in domains 1 and 2 running at up to 240MHz. However the reference manual section 2.4 says that AHB SRAM and AXI SRAM “can be addressed at maximum system clock frequency without wait state.” Is this correct? How can the bus and matrix be clocked at half the core speed and never introduce wait states? Table 33 of the datsheet also states that running from SRAM1 with the cache disabled, the performance is less than a quarter of running from ITCM (it doesn’t say where the data is for the benchmark, but for a fair comparison it would need to have been in the DTCM).

Hello,I am trying to update some code to use UART with DMA for receiving instead of the polling method.I want the implementation to work for messages of unknown length so I use the HAL_UARTEx_ReceiveToIdle_DMA function.I know that the maximum message length i can receive is MAX_LEN (=1024) so I call HAL_UARTEx_ReceiveToIdle_DMA(&huart2, my_buffer, MAX_LEN)The problem I noticed is that sometimes when I get in the HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) , the value of "Size" is equal to 1 even though I send 5 bytes in the UART. From what i understand, that this is because in the HAL_UART_IRQHandler (that is called when the line goes IDLE), there is this code:[...] /* Check if DMA mode is enabled in UART */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) { /* DMA mode enabled */ /* Check received length : If all expected data are rec

Dear,Setup:We using a STM32H7B0 100pins.We use 1 ADC input at 1M samplesConfigured as 16bit, differential input, with an offset of 32768.We use a Vref of 2.5V.The other side of the differential input is 1/2 of Vref (buffered with a opamp)To sample the data of the ADC we use a DMA circulaire mode to internal memory.When we measure our signal we seen many spikes on the samples.With the scope is the input signal very clean.Also we use a opamp to buffering the analog signal before it get tot the ADC input.The opamps we used are LTC6256We cannot understand why we seen all these spikes.What are we doing wrong here or is there an explanation for this phenomenon?

I just bought stm32 and i cant find any guides how can i enable led. I flashed pin PB7 so that it would output current

Hello everyone, I encountered a problem with overwriting OTP memory both from a user application and from the stm32 programmer.I write data to the OTP cell, close the memory using standard hal functions, turn off the power of the debug board, turn on the power, go to the stm programmer and see correctly written data.After that, I try to change one of the memory cells and the cube programmer gives me an error (which is correct, since this memory cell has already been written once). I close the error windows and read the memory, after that I see that the memory is CHANGED, but to a random number. This is repeated only once, that is, the cell can be written twice both from the PROGRAMMER and from the application.I tried to write the same data but to the addresses 0x08FF F000, 0x08FF F040, 0x08FF F080, and all the time the secondary cell write was triggered (the bottom picture).I also encountered a problem with calling NMI_Handler and HardFault_Handler when tryin

Need some clarification on implementing the DFU functionality on STM32L412KBU3.According to the note in AN2606 (page 350), it states: "VDDUSB IO must be connected to 3.3 V" however, on the STM32L412KBU3 (UFQFPN32) the VDDUSB pin does not exist.Currently, VDD is powered by +1V8 on my application of the STM32L412KBU3.Will I have any issues with DFU moving forward?

I have a test question about STM32G474 dual banks to ask :A test program for LED flashing has been successfully constructed in the IAR environment.Use STM32CubeProgrammer to load BANK1 starting from 0X8000000, DBANK=1,BFB2=0, and the program runs OKWhen BANK2 starting from 0x8040000 is loaded, DBANK=1 and BFB2=1, the program cannot runMay I ask to see if there are any problems with my application Settingsthank you

Hello everyone, please advise, I encountered difficulties when removing and installing memory read protection when programming h503 via the built-in UART bootloader.I use commands {0x92, 0x6D} to remove read protection and {0x82, 0x7D} to install read protection. On F103 these functions work correctly, on h503 they do not.At the same time, on 503, memory erase, ID reading and programming operations work correctly, the h503 microcontroller is flashed and after rebooting the new program takes effect.Perhaps I am sending incorrect read protection codes? Or is my mistake in something else?

Hi,In the STM32H753 reference manual revision 7 ADC section 25.4.8 page 932, there is a statement about ADC calibration:Anyone know what the extended period is that I should worry about? Thanks!  

Dear,We are using the ADC2 in 16-bit resolution at 100 kHz, operating in differential mode.The internal voltage reference (Vref) is set to 2.5 V.A 1 kHz sine wave with a peak-to-peak voltage of 2.5 V (ranging from 0 V to 2.5 V) is applied to the ADC inputs.Based on this setup, we expect the ADC output to vary between 0 and 65,535 after conversion.However, our actual measurements show values ranging approximately from 16,787 to 50,000.This suggests we are missing about 16384 counts on the lower and upper end.When we rescale the measured values to the full 0–65,535 range, it appears as though the ADC is working with a 3.3 V range instead of 2.5 V.Is this expected behaviour, or is there something we might be doing wrong?See attached files for the configuration.

Hi, with STM32F030C8T6, I am implemeting MODBUS protocol in RTU (Slave) with UART as physicsl layer. I use QModMaster (A master simulation software run in PC). I use oscilloscope to probe the actual information through the RS485.Recently I inplemented different baudrate and parity settings. While testing, I observed that data sent from master (QModMaster software running in PC) is correctly intrepreted by STM32 even when paity is flipped.For example, if master sends a data with Even parity, STM32 undertsand the data for both EVen paity as well as Odd paity. Buut when no paity is set in STM32, data is not understood by it. Similarly, if I set Odd paity in master, even then data is unserstood by STM32 is correct with Even paity and Odd paity.I am not so happy since this works in this way.For your info I have pasted by UART init code below:void USART1_Init(void){// Enable GPIOB and USART1 clocksRCC->AHBENR |= RCC_AHBEN

Hello,I am trying to implment MODBUS Slave RTU with STM32F030C8T6. I havce used RS485 for physical layer for communication.As per MODBUS protocol, a stream of 8 bit data will be sent from Master.  As a first step slave must capture all the data in an array, then process the data, do the required action and send back data.In MODBUS if there is silence of more than 3.65 milli seconds (for Baudrate of 9600) slave can decice that Masfet has finished the data transfer.I have used UART1 in Interrupt mode (RXNE) to receive the UART data and fill it in the array. Whenever a character is recived by UART, I reset the timer 3 to restart the timing of 3.65mS. If no data comes from UART for more than 3.65ms, slave will decide as teh frame is completed and start next actions.As of now, to analyze the received data, I used conditional statements and digital outputs inside while loop. I have oscilloscope too. Now the issue is. W

In order to make informed decisions on chosing a mcu model, we need... well... information.The older STM32-family infographics contained a fair amount of information about what to expect in terms of available peripheral mix from a given family and its constituents. The newer ones don't, forcing us to dig deep to individual model's pages and pdfs to painstakingly extract and organize that information. For example, for the new 'U5, we have: whereas this is what is for the - roughly comparable - 'L4:

Hi I just wanted to ask which of the two processors is actually more powerful. The H733 seems faster, but according to Google AI, the H753 offers better performance :). What’s your take on it? Thank youBR 

Hi,I'm confused about the maximum data transfer of the STM32H723ZG. The overview says:2×16-bit ADC, up to 3.6 MSPS in 16-bit: up to 18 channels and 7.2 MSPS in double-interleaved modeThen the 'AN5354 -  Getting started with the STM32H7 Series MCU 16-bit ADC' also mentions these data rates for the H7 series but not specifically the STM32H723ZG. This application note also specifies a huge discrepancy between different packages and rates:Then, assuming these numbers correspond to the direct channels, what are the data rates for the fast or even slow channels?  Also, CubeMX doesn't

Hi,I have the stm32c071 and I am running with TinyUSB 18.0 on it using CDC profile. Seems to work nicely but perhaps one in a 1000 IN transmissions the endpoint is re-activated out of the blue. Can't see that TinyUSB is doing something to make this happen (unless I have overlooked something) so my question is whether anyone has seen this behavior? I am trying to find out if this is a SW or a HW issue, and since I haven't been able to spot anything in TinyUSB I am now reaching out to hear if anyone has some information/knowledge that could help find the root cause. At the moment I can get by by setting the COUNT_TX value to 0 in the endpoint register after each transmission. The endpoint ought to have remained in NAK state as no call has been made to initiate a new transmission, and since I don't like to go about changing code without having properly identified the cause I am hoping the someone can help me getting the bottom of this.Kind regards,Christian

Greetings,We're a small team designing a board around the STM32N6 and need a large external memory (e.g. 64MB of SDRAM). Due to the complexity of routing and configuring timings I wonder if there exists a reference design for such a circuit, or at least for another MCU that's sufficiently similar that we can use it as a starting point. Any guidance would be very much appreciated.Regards,OV

Hello, I have been stuck on this issues where I cannot get my SPI slave running on the STM32H755 to successfully do full duplex communication. Right now I want the simplest case to work where the SPI master, also an STM32H755, sends a 16 bit data payload with a 16 bit attached CRC (so 4 byte total SPI frame) on the MOSI line. For simplicity, I am trying to send 0x5555 on the 16 bit data payload on the SPI slave over MISO with the HAL_SPI_TransmitReceive_DMA() function. For now I am ignoring the received data. Right now I have the SPI master successfully sending a dummy 16 bit data at 100 Hz. The problem is that the SPI slave is failing to send anything over MISO. From debugging it seems the issue is with using DMA. On the first call to HAL_SPI_TransmitReceive_DMA() i go into the SPI error callback and i get HAL_SPI_ERROR_DMA from HAL_SPI_GetError(). On the second call, I get an SPI error c

Hello there, I see in the datasheet for the STM32C071Rx that the version N (with VDDIO) marks PD4 as supplied by the pin VDDIO in the figure 10:But the table 12 doesn't marks it as a pin supplied by VDDIO but VDD instead:

Hello friends, Hardware DetailsMCU: STM32N657Z0H3QConfiguration: Custom PCB designBoot Mode: Attempting USB Boot (BOOT0=HIGH, BOOT1=LOW)Power: 1.8V system, SMPS for CORE (as per datasheet)Problem DescriptionI've designed a custom PCB using the STM32N657Z0H3Q and I'm facing issues getting it to enter boot mode. When I connect the board to my PC with BOOT0 pulled HIGH and BOOT1 pulled LOW, the USB device is not recognized by STM32CubeProgrammer.I've verified all power rails are providing the correct voltages. I've also tried multiple cables and USB ports to rule out simple connectivity issues.Additionally, I attempted using ST-LINK for programming but that's failing as well, which makes me suspect there might be a fundamental issue with my circuit design.What I've TriedConfirmed all power supplies are providing expected voltagesVerified boot pin configurations (BOOT0=HIGH, BOOT1=LOW)Tr

Where can I find a copy of the source code? Introduction to MB1971 LLC HAT 12 V to 7.5 V/1 A for F334 G474 Nucleo board - Application note

MCU: STM32U5G9VJI am sending simple single-line commands using the HAL_XPI library and the HSPI peripheral.Problem (See code at bottom of post):If I use the blocking call HAL_XSPI_Transmit, I get a timeout.if I use the DMA call HAL_XSPI_Transmit_DMA, I get a HAL_XSPI_ErrorCallback.The OSPI peripheral is working fine, it is the HSPI only that is having this issue.Clock Setup: 

Hi. In my program, I am transmitting the following CAN IDs at a 20ms cycle: 1. 0x0802. 0x1003. 0x15B4. 0x2155. 0x3156. 0x4157. 0x5158. 0x40D When continuing the periodic transmission, I have observed that sometimes No 4-8 do not flow on the CAN bus and are not transmitted periodically.I confirmed that when changing No 4-8 as follows, all data is transmitted periodically on the CAN bus: 1. 0x0802. 0x1003. 0x15B4. 0x215→0x15C *changed5. 0x315→0x15D *changed6. 0x415→0x15E *changed7. 0x515→0x15F *changed8. 0x40D→0x160 *changed Could you please explain why changing the CAN IDs allows for successful transmission? I appreciate your assistance.