Big Endian CRC

[arolin]

Posted on November 12, 2013 at 22:51

I would like to use the hardware CRC on the STM32F407 with DMA.

However, my data comes in Big Endian, so if I just use the memory to memory DMA setup my CRC does not compute correctly.

Is there a way that I can configure my DMA stream to perform a byteswap for me?

Section 10.3.10 of the reference manual [Doc ID 018909 Rev 5] refers to unpacking and edian behavior of the DMA stream but I don't understand if any of that is pointing to swapping 4bytes in a memory to memory transfer.

Alternately, if I have to use programmed IO, what is the fastest way to swap my bytes and send them off?

The following does what I want, but I suspect there is a way to acheive the same thing with far fewer operations.

  for(int u=0; u<8; u++) {

        uint32_t temp =0;

        temp|= (readBuff[(u*4)]&0xFF)<<24;

        temp|= (readBuff[(u*4+1)]&0xFF )<< 16;

        temp|= (readBuff[(u*4+2)]&0xFF) << 8;

        temp|= (readBuff[(u*4+3)]&0xFF) << 0;

        CRC->DR=temp;

    }

Thanks,

Amaury

#crc32 #dma #endian

[Tesla DeLorean]

Posted on November 12, 2013 at 23:11

The Cortex-M3/4 has an rbit instruction?

The STM32's CRC unit is suited to big-endian operation, because it's architecturally backward. Perhaps you don't have the right algorithm/polynomial, shift direction, or initial seed value? There are a lot of reasons it could break. Perhaps it would help for you to clearly state the nature of the CRC you are using, and some test data with correct CRC values?

[DEAD LINK /public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/CRC%20computation&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B&currentviews=4169]https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=%2Fpublic%2FSTe2ecommunities%2Fmcu%2FLists%2Fcortex_mx_stm32%2FCRC%20computation&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B¤tviews=4169

[Amel NASRI]

Posted on November 13, 2013 at 13:31

Hi,

The

http://www.st.com/st-web-ui/static/active/en/resource/technical/document/application_note/DM00068118.pdf

 gives more hints on how to use the CRC peripheral with details on its implementation. It describes also the use of the DMA as CRC data transfer controller.

You can download the software associated to this AN and providing example for CRC and DMA usage from this

http://www.st.com/web/en/catalog/tools/FM147/CL1794/SC961/SS1743/PF259064

.

-Mayla-

[arolin]

Posted on November 13, 2013 at 17:06

I followed that appnote best I could to get started.

When my DMA transfer completes, the CRC->DR is either still at 0xFFFFFFFF or will contain some value that does not match expectation.

When I use programmed IO to write to the CRC->DR I get the result that I want as long as I swap the byte order on my 32bit words before writing.  Clive's instructions to use rbit will swap the bit order, but I need to swap the byte order efficiently.

Thanks,

Amaury

[Tesla DeLorean]

Posted on November 13, 2013 at 17:18

So perhaps REV is what you need?

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0552a/BABJJDDB.html

If your simple byte switching isn't working, you need to carefully consider the polynomial being used. There are many 32-bit CRC methods, the ST design is targeted at one (the F3 has something else as I recall), and it's not even implemented in the most common form/use case.

Provide some more details on YOUR specific protocol, and test data examples. It will be a lot easier to solve your problem here.