Error in STM32H753 reference manual related to AES-GCM ?

[Gpeti]

I've found an inconsistency between different reference manuals of STM32 embedding the CRYP peripheral, about the management of IVs in GCM mode:

The HAL seems to implement the second solution.

Could you confirm ?

Best regards

[Jocelyn RICARD]

Helllo @Gpeti​ ,

looking in the STM32H7 Cryp example for GCM, it seems you are right!

uint32_t InitVector[4] = {0xcafebabe,0xfacedbad,0xdecaf888 , 0x00000002};
 
 hcryp.Init.pInitVect = InitVector;
 
 /* Set the initialization vector and the counter : Initial Counter Block (ICB)*/
 hcryp->Instance->IV0LR = *(uint32_t *)(hcryp->Init.pInitVect);
 hcryp->Instance->IV0RR = *(uint32_t *)(hcryp->Init.pInitVect + 1);
 hcryp->Instance->IV1LR = *(uint32_t *)(hcryp->Init.pInitVect + 2);
 hcryp->Instance->IV1RR = *(uint32_t *)(hcryp->Init.pInitVect + 3);

I will raise the point internally

Thank you raising the point

Best regards

Jocelyn

[Gpeti]

Hello,

I've just had a look to the new revision of STM32H753 ref manual and this point has not been adressed. A bit disappointing...