STM32H750VBT6 access crypt registers all read back zero

[Roger, Huang]

Hi,

Developing AES GCM on a customer board that is used STM32H750VBT6 with CubeMX 6.1.1 has a problem needs help.

Tested example code CRYP_AES_GCM from STM32Cube_FW_H7_V1.8.0 Projects/STM32H735G-DK/Examples/CRYP is failed. And used JLINK debug figure out all registers of crypt are all zero. and test code run to DES cipher.

Has any suggestion?

Thanks

[Tesla DeLorean]

Check that the clock is enabled in the RCC and any secondary clocks or PLLs it might need. Check also HASH unit.

​

A​ttach a photograph of the IC top markings. Clear and in focus.

[Roger, Huang]

Tesla,

Thank your great help.

After checked HASH is also read back zero and both can not modified any bit of their registers.

I also checked RCC registers too CLK of HASH, CRPY are both enabled, but only PLL1 is enabled and stable.

[Roger, Huang]

@Community member​ 

I'm stuck with this issue. Could you share more clues to let me try?

BR

Roger, Huang

[Tesla DeLorean]

Check the soldering in the low right.

Do you have a USART wired on the board that can be used to output diagnostic output? Define USART and PINS

What HSE frequency are you using?

[Roger, Huang]

It has featur 2 USARTs​, and uses SWO for debug print.

And no SHE, use SHI for system clock.

SHI now is configured 64MHz

The system clock has been tested 480, and 240MHz​

[Lulo]

Hello,

I have the same issue with the same chip in the same revision STM32H750VBT6 rev_V. CRYP registers remain 0 even with the last update of HAL drivers. Other functions are OK.

The code works well with another board with an older revision STM32H750VBT6 rev_Y.

It seems that tools do not manage correctly rev_V.

I'm stuck. Is there a change or an update to apply to make it work with the last (and now only) chip revision available?

[Pavel A.]

Below is a small test that we use to distinguish H753 from H743. H750 is similar to 753, so this should work on that too,

#ifndef STM32H753xx
#define STM32H753xx /* override! */
#undef STM32H743xx
#endif
 
#include "stm32h7xx_hal.h"
#include <stdbool.h>
 
// Test if the STM32H7 crypto is actually working,
// so this is H7 variant with crypto (ex. H753 vs H743)
// Check that CR regster of HASH or CRYP holds written value
bool H7_hw_crypto_test()
{
 // Test if HASH->CR is writable
 __HAL_RCC_HASH_CLK_ENABLE();
 HAL_Delay(5);
 HASH->CR = 0;
 __DSB();
 HASH->CR = 0x20; // set HASH_CR_DATATYPE=HASH_DATATYPE_8B
 __DSB();
 uint32_t u = HASH->CR;
 bool y = ((u & 0x30) == 0x20);
 
 if (!y) {
 __HAL_RCC_HASH_CLK_DISABLE();
 }
 return y;
}

[Tesla DeLorean]

@Pavel A.​  thanks for posting that

[Lulo]

Thank you for the test code. I have tried it. I confirm that it returns "false" for the chip in rev V, and that all HASH and CRYP registers return always zero. Here is a picture of this chip:

On an older chip in rev Y, the test code return "true" and both HASH / CRYP registers have correct values. For example, CRYP->SR is correctly initialised at 0x3. Here is a picture of this older chip that works perfectly:

 

Do I have to conclude that my chip in rev V does not provide the hardware HASH and CRYP functions?

Both chip are H750 versions, and according to datasheet should feature these functions.

[Roger, Huang]

Update: tested on CubeMX 6.2.1 , MCU package 1.9.0: Makefile generation

1. Date code : 051 is work as register accessible.
2. Data code: 036 is failed to access register. checked by verify program, and STM32CubeProgrammer both.

Could have any input?

[Tesla DeLorean]

Got another 039 failure here, back/cross linking these threads so I can find them later

https://community.st.com/s/question/0D53W000010RpinSAC/how-to-enable-the-stm32h750vbt6-hw-crypto

https://community.st.com/s/question/0D53W000005rNVJSA2/we-are-using-stm32h750vb-for-this-please-send-me-crypto-aes-128bit-code-examples-in-online-we-got-lot-of-crypto-lib-but-we-need-example-source-code-for-this-crypto-aes128-bit

https://community.st.com/s/question/0D53W00000iCLZPSA4/what-could-cause-the-crypto-processor-to-freeze-on-stm32h750vb