X-CUBE-CRYPTOLIB - Hard Fault error with Dual core microcontrollers

[EsraaAli]

Hello,

i'm using stm32h747igt6 microcontroller, it has two cores Arm Cortex-M7 + Cortex-M4, i'm currently working on core m7, and i have integrated STM32 cryptographic firmware library software expansion for STM32Cube for some security features in my project, when i use any encryption or decryption api, whether it's AES or RSA i got hard fault error at calling the library API, like:

  retval = cmox_cipher_decrypt(CMOX_AES_CBC_DEC_ALGO,             

                               Expected_Ciphertext, sizeof(Expected_Ciphertext), 

                               Key, sizeof(Key),                   

                               IV, sizeof(IV),                        

                               Computed_Plaintext, &computed_size);  .

and i can not debug the error because it's due to calling an API that is in the static library code.

so i want to know why does this happen? are there any specific configurations needed to use this X-CUBE-CRYPTOLIB library "STM32 cryptographic firmware library software expansion for STM32Cube" with dual core controllers?

Note that i have tried the library with many single core microcontrollers like stm32f103c8t6 and stm32f446re and it worked very well.

[Tesla DeLorean]

Have a HardFault Handler that outputs actionable data, inspect the registers and disassemble the preceding code.

Most likely errant pointer, accessing some unpermitted area, alignment or wrong instructions (ISA)

Not having the source doesn't preclude you looking at the code the MCU objects too.

Try and create a project that minimally demonstrates the issue that you can share with ST

[STea]

Hello @EsraaAli ,
Just wanted to know which library you are implementing for your dual core microcontroller is it the CM7 or the CM4 specific one and also you will have to activate the CRC for the library to work properly. is it activated?
Regards

[Tesla DeLorean]

When are we going to stop with this CRC nonsense for obfuscating constants and initialization?

How can this be thread/core safe? It's not improbable that you could create a situation where both cores tickle the CRC at the same instance, or for that matter the crypt/hash hardware.