CPU2 cannot initialize when jumping from Boot to App

[AFink]

Hi,

Background

Working on STM32WB55.

Flash size is 1MByte.

Attached .ld file describes: Boot, Bank 0 (App1), Bank 1 (App2) and DB sections.

Boot and App linker files (.ld) are quite similar from memory management aspect.

App .ld file 

/* Specify the memory areas */
MEMORY
{
FLASH_BOOT (rx)			: ORIGIN = _BOOT_START,		LENGTH = _BOOT_SIZE 	/* 32KB for BOOT						End address: 0x08007FFF */
FLASH_BANK_0 (rx)		: ORIGIN = _BANK_0_START, 	LENGTH = _BANK_0_SIZE /* 250KB for Bank 0 (Factory version)	End address: 0x0805F7FF */
FLASH_BANK_1 (rx)		: ORIGIN = _BANK_1_START, 	LENGTH = _BANK_1_SIZE /* 250KB for Bank 1 (New version)		End address: 0x080B6FFF */
FLASH_DB_CFG (rx)		: ORIGIN = _DB_CFG_START,	LENGTH = _DB_CFG_SIZE	/* 16KB for DB (Configuration) 			End address: 0x080BAFFF*/
RAM (xrw)				: ORIGIN = 0x20000004, 		LENGTH = 0x2FFFC
RAM_SHARED (xrw)		: ORIGIN = 0x20030000, 		LENGTH = 10K
}

Scenario

Jump from Boot to App (Bank 0)

Problem

1. When App size of Bank 0 and Bank 1 is lower than 250KByte --> Working well (Jump from Boot to App (Bank 0))
2. When App size of Bank 0 and Bank 1 is bigger than 250KByte --> Not Working well --> CPU2 cannot initialize when jumping from Boot to App. [I have WDG in this case, so after MCU is reset by WDG CPU2 succeeds to initialize. The problem occurs in Power-up]

** Can somebody help to understand why is that (CPU2 cannot initialize when jumping from Boot to App)?

 

Thanks,

Aviv

[AFink]

Hi,

Further to above post, I noticed that al long as FLASH_BANK_1 (in .ld file) is ended in address lower than ~512KByte --> then CPU2 is initialized successfully.

BUT, once FLASH_BANK_1 is ended in address bigger than ~512KByte --> then CPU2 is has problems to initialize.

Question:

Is there any issue with application that is defined in .ld file to run on the second half of the flash (i.e.: in address bigger than 512KByte out of 1MByte)?

 

Thanks,

Aviv

[STTwo-32]

Hello @AFink 

I think it may be a problem on the limits of the available FLASH. since a part of the flash (start from the SFSA address) is used by the CPU2. The part 4.2 of the AN5289 Rev 18 can give you more details about that.

Best Regards.

STTwo-32