Ethernet not working in u-boot: "Could not get PHY for ethernet@5800a000: addr 0 phy_connect() failed"

[NHuhs.2394]

hi,

I am working with a custom board based on the STM32MP157C.

I use a lan9303 chip which is acting as a switch for ethernet. In the linux kernel, there are no problems with the ethernet but I can't get it to work in u-boot. Even when I use the same Device-Tree layout for the ethernet and phy.

The address 0 is the same thats used by the kernel but u-boot doesn't seem to find the phy there.

The device tree for ethernet looks like this:

&ethernet0 {
 status = "okay";
 pinctrl-0 = <&ethernet0_rmii_pins_a>;
 pinctrl-1 = <&ethernet0_rmii_pins_sleep_a>;
 pinctrl-names = "default", "sleep";
 phy-mode = "rmii";
};
 
&pinctrl {
	ethernet0_rmii_pins_a: rmii-0 {
		pins1 {
			pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
				 <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
				 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
				 <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK */
				 <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
				 <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
			bias-disable;
			drive-push-pull;
			slew-rate = <2>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
				 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
				 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
			bias-disable;
		};
	};
 
	ethernet0_rmii_pins_sleep_a: rmii-sleep-0 {
		pins1 {
			pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
				 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
				 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
				 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
				 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
				 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */
				 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
				 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
				 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
		};
	};
};

For the phy like this:

&mdio0 {
 
 	phy0: ethernet-phy@0 {
 
 		compatible = "ethernet-phy-id0022.1622";
 
 		reg = <0>;
 
	};
 
};

This is basically the same as the device tree configuration for the Kernel, but its not working.

Maybe someone here can help me.

[OlivierK]

Hi NHuhs.2394 (Community Member)

The approach to solve this issue is very dependent on the delivery version used and how the phy is driven (external Crystal source clock to the phy or clock managed by the RCC).

On OpenSTLinux latest delivery, the ethernet0 node syntax is now the same in U-Boot and in Linux DTS but it was not necessarely the case in previous release versions.

Can you provide the log file, distribution version used, h/w configuration to the phy, and the ethernet clocks in DT?

Rgds,

Olivier

[NHuhs.2394]

Hi Olivier

Sorry for the late reply.

We are using Karo-Electronics QSMP-1570 Modell which uses a stm32mp157.

Therefore we are using Karo's Yocot-Zeus distribution.

The Lan-chip is used as RMII with Crystal on PHY,(This works without error in the linux Kernel but not u-boot)

The Ethernet clocks look like this:

ethernet0: ethernet@5800a000 {
			compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
			reg = <0x5800a000 0x2000>;
			reg-names = "stmmaceth";
			interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 <&exti 70 1>;
 		interrupt-names = "macirq",
 	 "eth_wake_irq",
 	 "stm32_pwr_wakeup";
			clock-names = "stmmaceth",
				 "mac-clk-tx",
				 "mac-clk-rx",
				 "ethstp";
			clocks = <&rcc ETHMAC>,
				 <&rcc ETHTX>,
				 <&rcc ETHRX>,
				 <&rcc ETHSTP>;
			st,syscon = <&syscfg 0x4>;
			snps,mixed-burst;
			snps,pbl = <2>;
			snps,en-tx-lpi-clockgating;
			snps,axi-config = <&stmmac_axi_config_0>;
			snps,tso;
			status = "disabled";
		};

The boot ouput:

CPU: STM32MP157CAC Rev.B
Model: Ka-Ro electronics GmbH QSMP-1570 solder-in module for diestel
Board: QSMP-1570 in basic mode (karo,stm32mp157c-qsmp-1570)
DRAM: 512 MiB
Clocks:
- MPU : 650 MHz
- MCU : 208.878 MHz
- AXI : 266.500 MHz
- PER : 24 MHz
- DDR : 533 MHz
product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V
WDT: Started without servicing (0s timeout)
MMC: STM32 SD/MMC: 2, STM32 SD/MMC: 0
Loading Environment from MMC... OK
In: serial@40010000
Out: serial@40010000
Err: serial@40010000
Net: MAC addr from fuse: 00:0c:c6:88:4f:c0
Could not get PHY for ethernet@5800a000: addr 0
phy_connect() failed
No ethernet found.
 
Hit any key to stop autoboot: 0
QSMP U-Boot >

Thank you.

BR,

Niklas

[OlivierK]

Hello Niklas,

Yocto 3.0 Zeus is rather old (release 2019-10-23) are you on kernel 4.19 ?

If true, as far as Ethernet device tree, please have a look at this:

https://wiki.st.com/stm32mpu-ecosystem-v1/wiki/Ethernet_device_tree_configuration.

I noticed that

power-domains = <&pd_core>;

is not present in your DT.

You may have a look at this post which relates to lan9303 regarding the mdio configuration.

https://community.st.com/s/question/0D53W00001CQD5xSAH/lan9303-switch-device-tree-stm32mp1

Did you verify that in u-boot, the 50MHz clock is present, PHY is powered, phy reset pin available?

I guess you've enabled the LAN9303 in linux menuconfig, do you have it also U-boot side? Any driver patch available from the phy vendor?

Regards,

Olivier

[NHuhs.2394]

Hi Olivier,

Yes, I originally started this project in 2019.

It's on Kernel 5.7.1

adding the line

power-domains = <&pd_core>;

produces an error:

| arch/arm/dts/stm32mp153a-qsmp-1530.dtb: ERROR (phandle_references): /soc/ethernet@5800a000: Reference to non-existent node or label "pd_core"
|

And it's not present in the DT for the Kernel either, where ethernet is working.

The lan9303 is used kind of like an external switch.

While the Board is in u-boot I am able to use this switch functionality. (Right now my PC is connected to one of the Ports while my router is connected to the other Port)

I used the the following Ethernet and PHY-Drivers in menuconfig.:

Is there any way I can inspect the u-boot device tree, while in u-boot?

Like the "fdt print" command which shows the flattened device tree for the Kernel.

The reset pin should be available as well.

Thank you.

BR,

Niklas

[OlivierK]

Hi Niklas,

Did you make any progress? it seems this particular phy needs a reset connected :

Use lan9303 in mdio mode on STM32MP157

&mdio0 {

reset-gpios = <&gpioa 4 GPIO_ACTIVE_LOW>;

reset-delay-us = <10000>;

post-reset-delay-us = <1000>;

phy0: ethernet-phy@0 {

compatible = "ethernet-phy-id0022.1622";

reg = <0>;

};

Regards

Olivier