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February 7, 2026
Question

Failed to init the clock at STM32MP257: What is clock ID 5?

  • February 7, 2026
  • 4 replies
  • 349 views

I got a panic message from drivers/st/clk/clk-stm32-core.c at Trusted Firmware.

 My question is: What is clock ID 5? Is that MSI clock or LSE clock?

Is there any information I could read about this ID?

int clk_stm32_enable_call_ops(struct stm32_clk_priv *priv, uint16_t id)
{
	const struct stm32_clk_ops *ops = _clk_get_ops(priv, id);

	if ((ops->is_enabled != NULL) && ops->is_enabled(priv, id)) {
		return 0;
	}

	if (ops->enable != NULL) {
		ops->enable(priv, id);
	}

	if ((ops->is_enabled != NULL) && !ops->is_enabled(priv, id)) {
		ERROR("failed to enable clock id: %u\n", id);
		panic();
	}

	return 0;
}

 

The output is

NOTICE: Early console setup
ERROR: failed to enable clock id: 5
BACKTRACE: START: clk_stm32_enable_call_ops
0: EL3: 0xe017bac
1: EL3: 0xe01be2c
2: EL3: 0xe01beb0
3: EL3: 0xe01bf54
4: EL3: 0xe01c240
5: EL3: 0xe01db28
6: EL3: 0xe029a2c
7: EL3: 0xe0170dc
BACKTRACE: END: clk_stm32_enable_call_ops
PANIC at PC : 0x000000000e01be34

 

4 replies

PatrickF
Technical Moderator
February 9, 2026
In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.NEW ! Sidekick STM32 AI agent, see here
DMårtAuthor
Lead
February 9, 2026

@PatrickF 

It's for STM32MP257, not STM32MP157.

STM32MP151AAC3 custom board with STM32-OS as operating system: https://github.com/DanielMartensson/STM32-ComputerSTM32MP257FAK3 custom board with STM64-OS as operating system: https://github.com/DanielMartensson/STM64-Computer
PatrickF
Technical Moderator
February 9, 2026

Sorry for mixed-up.

So, definitely not I2S_CLK as per https://github.com/STMicroelectronics/arm-trusted-firmware/blob/v2.10-stm32mp/include/dt-bindings/clock/stm32mp25-clks.h

 

Probably not MSI (which is internal).

It could be LSE (e.g. fail to start oscillator), but not sure it is used in TF-A.

Are you sure about HSE oscillation and setup in DT ?

Regards

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.NEW ! Sidekick STM32 AI agent, see here
DMårtAuthor
Lead
February 9, 2026

@PatrickF

Here is a longer output of the error message. I think there is something in the DT that are missing.

NOTICE: Early console setup
mmap:
 VA:0xe017000 PA:0xe017000 size:0x21000 attr:0x2 granularity:0x40000000
 VA:0xe000000 PA:0xe000000 size:0x40000 attr:0x4a granularity:0x40000000
 VA:0xe040000 PA:0xe040000 size:0x10000 attr:0x4a granularity:0x40000000
 VA:0x40000000 PA:0x40000000 size:0x40000000 attr:0x48 granularity:0x40000000

VERBOSE: Translation tables state:
VERBOSE: Xlat regime: EL3
VERBOSE: Max allowed PA: 0x1ffffffff
VERBOSE: Max allowed VA: 0x1ffffffff
VERBOSE: Max mapped PA: 0x7fffffff
VERBOSE: Max mapped VA: 0x7fffffff
VERBOSE: Initial lookup level: 1
VERBOSE: Entries @initial lookup level: 8
VERBOSE: Used 2 sub-tables out of 4 (spare: 2)
 [LV1] VA:0x0 size:0x40000000
 [LV2] VA:0x0 size:0x200000
 [LV2] (111 invalid descriptors omitted)
 [LV2] VA:0xe000000 size:0x200000
 [LV3] VA:0xe000000 PA:0xe000000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe001000 PA:0xe001000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe002000 PA:0xe002000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe003000 PA:0xe003000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe004000 PA:0xe004000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe005000 PA:0xe005000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe006000 PA:0xe006000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe007000 PA:0xe007000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe008000 PA:0xe008000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe009000 PA:0xe009000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe00a000 PA:0xe00a000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe00b000 PA:0xe00b000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe00c000 PA:0xe00c000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe00d000 PA:0xe00d000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe00e000 PA:0xe00e000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe00f000 PA:0xe00f000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe010000 PA:0xe010000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe011000 PA:0xe011000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe012000 PA:0xe012000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe013000 PA:0xe013000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe014000 PA:0xe014000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe015000 PA:0xe015000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe016000 PA:0xe016000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe017000 PA:0xe017000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe018000 PA:0xe018000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe019000 PA:0xe019000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe01a000 PA:0xe01a000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe01b000 PA:0xe01b000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe01c000 PA:0xe01c000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe01d000 PA:0xe01d000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe01e000 PA:0xe01e000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe01f000 PA:0xe01f000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe020000 PA:0xe020000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe021000 PA:0xe021000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe022000 PA:0xe022000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe023000 PA:0xe023000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe024000 PA:0xe024000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe025000 PA:0xe025000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe026000 PA:0xe026000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe027000 PA:0xe027000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe028000 PA:0xe028000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe029000 PA:0xe029000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe02a000 PA:0xe02a000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe02b000 PA:0xe02b000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe02c000 PA:0xe02c000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe02d000 PA:0xe02d000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe02e000 PA:0xe02e000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe02f000 PA:0xe02f000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe030000 PA:0xe030000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe031000 PA:0xe031000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe032000 PA:0xe032000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe033000 PA:0xe033000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe034000 PA:0xe034000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe035000 PA:0xe035000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe036000 PA:0xe036000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe037000 PA:0xe037000 size:0x1000 MEM-RO-EXEC-S
 [LV3] VA:0xe038000 PA:0xe038000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe039000 PA:0xe039000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe03a000 PA:0xe03a000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe03b000 PA:0xe03b000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe03c000 PA:0xe03c000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe03d000 PA:0xe03d000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe03e000 PA:0xe03e000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe03f000 PA:0xe03f000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe040000 PA:0xe040000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe041000 PA:0xe041000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe042000 PA:0xe042000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe043000 PA:0xe043000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe044000 PA:0xe044000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe045000 PA:0xe045000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe046000 PA:0xe046000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe047000 PA:0xe047000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe048000 PA:0xe048000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe049000 PA:0xe049000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe04a000 PA:0xe04a000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe04b000 PA:0xe04b000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe04c000 PA:0xe04c000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe04d000 PA:0xe04d000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe04e000 PA:0xe04e000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe04f000 PA:0xe04f000 size:0x1000 MEM-RW-XN-S
 [LV3] VA:0xe050000 size:0x1000
 [LV3] (431 invalid descriptors omitted)
 [LV2] VA:0xe200000 size:0x200000
 [LV2] (398 invalid descriptors omitted)
 [LV1] VA:0x40000000 PA:0x40000000 size:0x40000000 DEV-RW-XN-S
 [LV1] VA:0x80000000 size:0x40000000
 [LV1] (5 invalid descriptors omitted)
VERBOSE: Couldn't find property st,drive in dtb
VERBOSE: Couldn't find property st,drive in dtb
VERBOSE: Couldn't find property st,drive in dtb
VERBOSE: Couldn't find property st,drive in dtb
VERBOSE: Couldn't find property csg in dtb
VERBOSE: Couldn't find property frac in dtb
VERBOSE: Couldn't find property csg in dtb
VERBOSE: Couldn't find property frac in dtb
VERBOSE: Couldn't find property csg in dtb
VERBOSE: Couldn't find property frac in dtb
VERBOSE: Generic delay timer configured with mult=1 and div=64
ERROR: failed to enable clock id: 5
BACKTRACE: START: clk_stm32_enable_call_ops
0: EL3: 0xe017bac
1: EL3: 0xe01c210
2: EL3: 0xe01c294
3: EL3: 0xe01c338
4: EL3: 0xe01c640
5: EL3: 0xe01df28
6: EL3: 0xe02b118
7: EL3: 0xe0170dc
BACKTRACE: END: clk_stm32_enable_call_ops
PANIC at PC : 0x000000000e01c218

 

STM32MP151AAC3 custom board with STM32-OS as operating system: https://github.com/DanielMartensson/STM32-ComputerSTM32MP257FAK3 custom board with STM64-OS as operating system: https://github.com/DanielMartensson/STM64-Computer
PatrickF
Technical Moderator
February 9, 2026

Hi,

maybe there is some missing DT information expected as mandatory by TF-A

  • st,drive sound like oscillator like LSE or HSE
  • csg and frac maybe be related to PLL 

Altough not seen in https://github.com/STMicroelectronics/arm-trusted-firmware/blob/v2.10-stm32mp/fdts/stm32mp257f-ev1-ca35tdcid-rcc.dtsi

It might be elsewhere (missing 'include' somewhere ?)

 

Sorry not helping more. This is out of my knowledge.

 

Regards.

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.NEW ! Sidekick STM32 AI agent, see here
DMårtAuthor
Lead
February 11, 2026

@PatrickF 

Yes. LSE was ID 5. But I don't know if I'm in need of LSE. I don't have any RTC or tamper activated. I have not even LSE activated at all.

 

NOTICE: Early console setup
NOTICE: clk_stm32_get_oscillator_name: id = 0
NOTICE: clk_stm32_get_oscillator_name: id = 1
NOTICE: clk_stm32_get_oscillator_name: id = 2
NOTICE: clk_stm32_get_oscillator_name: id = 3
NOTICE: clk_stm32_get_oscillator_name: id = 4
NOTICE: clk_stm32_get_oscillator_name: id = 5
NOTICE: clk_stm32_get_oscillator_name: id = 6
NOTICE: clk_stm32_init: priv->num = 152
NOTICE: clk_stm32_init: i = 0
NOTICE: clk_stm32_init: i = 1
NOTICE: clk_stm32_init: ops->init(priv, 1)
NOTICE: clk_stm32_osc_init: id = 1, name = clk-hsi
NOTICE: clk_stm32_init: i = 2
NOTICE: clk_stm32_init: ops->init(priv, 2)
NOTICE: clk_stm32_osc_init: id = 2, name = clk-hse
NOTICE: clk_stm32_init: i = 3
NOTICE: clk_stm32_init: ops->init(priv, 3)
NOTICE: clk_stm32_osc_init: id = 3, name = clk-msi
NOTICE: clk_stm32_init: i = 4
NOTICE: clk_stm32_init: ops->init(priv, 4)
NOTICE: clk_stm32_osc_init: id = 4, name = clk-lsi
NOTICE: clk_stm32_init: i = 5
NOTICE: clk_stm32_init: ops->init(priv, 5)
NOTICE: clk_stm32_osc_init: id = 5, name = clk-lse
NOTICE: clk_stm32_init: i = 6
NOTICE: clk_stm32_init: ops->init(priv, 6)
NOTICE: clk_stm32_osc_init: id = 6, name = i2s_ckin
NOTICE: clk_stm32_init: i = 7
NOTICE: clk_stm32_init: ops->init(priv, 7)
NOTICE: clk_stm32_osc_init: id = 7, name = spdif_symb
NOTICE: clk_stm32_init: i = 8
NOTICE: clk_stm32_init: i = 9
NOTICE: clk_stm32_init: i = 10
...
NOTICE: clk_stm32_init: i = 151
NOTICE: _clk_stm32_enable: CLK Lock
NOTICE: _clk_stm32_enable_core: if (parent != CLK_IS_ROOT)
NOTICE: _clk_stm32_enable_core: Calling clk_stm32_enable_call_ops
NOTICE: clk_stm32_enable_call_ops: Enabling with id = 2
NOTICE: _clk_stm32_enable_core: Increase priv->gate_refcounts[2] from 0 to 1
NOTICE: _clk_stm32_enable: CLK Unlock: 0
NOTICE: _clk_stm32_enable: CLK Lock
NOTICE: _clk_stm32_enable_core: if (parent != CLK_IS_ROOT)
NOTICE: _clk_stm32_enable_core: Calling clk_stm32_enable_call_ops
NOTICE: clk_stm32_enable_call_ops: Enabling with id = 3
NOTICE: _clk_stm32_enable_core: Increase priv->gate_refcounts[3] from 0 to 1
NOTICE: _clk_stm32_enable: CLK Unlock: 0
NOTICE: _clk_stm32_enable: CLK Lock
NOTICE: _clk_stm32_enable_core: if (parent != CLK_IS_ROOT)
NOTICE: _clk_stm32_enable_core: Calling clk_stm32_enable_call_ops
NOTICE: clk_stm32_enable_call_ops: Enabling with id = 4
NOTICE: _clk_stm32_enable_core: Increase priv->gate_refcounts[4] from 0 to 1
NOTICE: _clk_stm32_enable: CLK Unlock: 0
NOTICE: _clk_stm32_enable: CLK Lock
NOTICE: _clk_stm32_enable_core: if (parent != CLK_IS_ROOT)
NOTICE: _clk_stm32_enable_core: Calling clk_stm32_enable_call_ops
NOTICE: clk_stm32_enable_call_ops: Already enabled with id = 1
NOTICE: _clk_stm32_enable_core: Increase priv->gate_refcounts[1] from 0 to 1
NOTICE: _clk_stm32_enable: CLK Unlock: 0
NOTICE: _clk_stm32_enable: CLK Lock
NOTICE: _clk_stm32_enable_core: Increase priv->gate_refcounts[2] from 1 to 2
NOTICE: _clk_stm32_enable: CLK Unlock: 0
NOTICE: _clk_stm32_enable: CLK Lock
NOTICE: _clk_stm32_enable_core: Increase priv->gate_refcounts[3] from 1 to 2
NOTICE: _clk_stm32_enable: CLK Unlock: 0
NOTICE: _clk_stm32_enable: CLK Lock
NOTICE: _clk_stm32_enable_core: Increase priv->gate_refcounts[4] from 1 to 2
NOTICE: _clk_stm32_enable: CLK Unlock: 0
NOTICE: _clk_stm32_enable: CLK Lock
NOTICE: _clk_stm32_enable_core: if (parent != CLK_IS_ROOT)
NOTICE: _clk_stm32_enable_core: Calling clk_stm32_enable_call_ops
NOTICE: clk_stm32_enable_call_ops: Enabling with id = 5
ERROR: failed to enable clock id: 5
BACKTRACE: START: clk_stm32_enable_call_ops
0: EL3: 0xe017bac
1: EL3: 0xe01bf04
2: EL3: 0xe01bfb4
3: EL3: 0xe01c060
4: EL3: 0xe01c3ac
5: EL3: 0xe01dd0c
6: EL3: 0xe029c10
7: EL3: 0xe0170dc
BACKTRACE: END: clk_stm32_enable_call_ops
PANIC at PC : 0x000000000e01bf0c

 

 

STM32MP151AAC3 custom board with STM32-OS as operating system: https://github.com/DanielMartensson/STM32-ComputerSTM32MP257FAK3 custom board with STM64-OS as operating system: https://github.com/DanielMartensson/STM64-Computer
DMårtAuthor
Lead
February 12, 2026

Hi @PatrickF 

I just want to say that I made an if-statement that check if the LSE is disabled. If they are disabled, it should only print out a warning and not call the panic function.

I think that the ST's tf-a assumes that both LSE and HSI should be active. 

To reproduce this:

1. Remove the LSE crystal from DK/EV board

2. Disable LSE in CubeMX

3. Recompile new OpenSTLinux

4. Boot

5. View the early boot log

STM32MP151AAC3 custom board with STM32-OS as operating system: https://github.com/DanielMartensson/STM32-ComputerSTM32MP257FAK3 custom board with STM64-OS as operating system: https://github.com/DanielMartensson/STM64-Computer
OlivierK
Technical Moderator
April 10, 2026

Hello @DMårt 

Thank you for your feedback, a patch is now available from OSTL DV6.1.1. It deactivates the external oscillator when not available, and prevents panic. It applies for STM32MP2xx and STM32MP1xx product familes.

For reference: https://community.st.com/t5/stm32-mpus-products-and-hardware/stm32mp135a-needs-an-lse-meta-st-stm32mp/m-p/858884#M15494

 

 

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.