Max clock for I2C for stm32mp157a

[Gencay]

1. I have several questions first one is what is the max clock for I2C, minimum is pointed at this sheet but what is the max?
2. Again for the same sheet for the LCD-TFT controller, I will be using 1.8V LVDS display so fclk frequency will be 45 MHz max right? If so would be the affect for the display having 45 MHz instead of 90 MHz?
3. For SAI and SPI conditions are between 1.71<Vdd<3.6 and 2.7<Vdd<3.6 so shouldn't it the first one should be 1.71<Vdd<2.7 ? What happens if Vdd=1.8V?
4. For USART max frequency is 27 MHz on the sheet, however for the stm32mp157a-ev1 board it is 60 MHz default. Does not it cause problem?

Thank you in advance.

[PatrickF]

HI @Gencay,

I think your mixed-up external clocks (i.e. pins) and internal clock (aka bus clocks and kernel clocks).

In Datasheet, you mostly see external clock on pins (unless otherwise indicated).

Internal clock limits are mostly visible in RCC section inside Reference Manual (look for "Peripheral clock distribution overview" table).

1) max I2C clock on the pin is as per standard 1MHz (FastMode+). Internal clock for I2C is either 104.5MHz or 133MHz depending on I2C instance.

2) LTDC has lower IO strength when used at 1.8V, this will limit the frequency and so the pixel/s capabilities which constrains the frame rate and the display resolution.

See also ES0438 as there is also some potential LTDC clock limitations depending on HSE clocking type and load on LTDC pins.

3) it is usual to have overlapping ranges within electrical characteristics. You should use the most favorable line including your VDD operating point.

4) I guess you mixed up :

• 27MHz which is the clock on the pin when USART is used in slave synchronous mode
• 60MHz, which is the clock feed internally to the USART IP (which could be up to 104.5 or 133MHz depending of UART instance)

Regards.

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