PWM Limits for STM32MP1

[NPal.2]

Hi all,

Referring to previous discussion I had.

I just want understand what are the PWM limits for STM32MP1.

I can't seem to generate PWM signal below 100ms.

Any inputs will be appreciated.

My target frequency is 1KHz.

https://community.st.com/s/question/0D53W000014y9ZzSAI/maximum-value-of-pwm-period

[PatrickF]

Hi,

not tested, but have you tried to ensure duty_cycle is always smaller than period ?

I have tested TIM1 using pwm-leds like described here https://wiki.st.com/stm32mpu/wiki/TIM_device_tree_configuration#TIM_configured_in_PWM_mode

&timers1 {
	/* status = "okay"; */
	/* spare all DMA channels since they are not needed for PWM output */
	/delete-property/dmas;
	/delete-property/dma-names;
	/* define pwm1 label */
	pwm1: pwm {
		/* configure PWM pins on TIM1_CH1 */
		pinctrl-0 = ;
		pinctrl-1 = ;
		pinctrl-names = "default", "sleep";
		/* enable PWM on TIM1 */
		status = "okay";
	};
		/* PWM DT user on TIM1_CH1: "pwm1", tim1_test with "pwm-leds" */
	pwmleds {
		compatible = "pwm-leds";
		tim1_test {
			label = "PWM-TEST";
			/* Use pwm1 channel 0 (e.g. TIM1_CH1) */
			/* period in nanoseconds (***), normal polarity (0) */
			pwms = ;
			max-brightness = ;
			default-trigger = "default-on";
		};
	};
};

So, not really similar to your case (here period is fixed in DT and I think cannot being changed using sysfs), but behind it is using same timer driver.

With brightness at 127 (50%), I end up to:

root@stm32mp1:~# echo 127 > /sys/class/leds/PWM-TEST/brightness
root@stm32mp1:~# cat /sys/kernel/debug/pwm
platform/44000000.timer:pwm, 4 PWM devices
 pwm-0 (tim1_test ): requested enabled period: 1197 ns duty: 596 ns polarity: normal
 pwm-1 ((null) ): period: 0 ns duty: 0 ns polarity: normal
 pwm-2 ((null) ): period: 0 ns duty: 0 ns polarity: normal
 pwm-3 ((null) ): period: 0 ns duty: 0 ns polarity: normal

Regards,