Reserved memory region for M4 in ddr

[VKare.1]

Hello!

I try to understand how to exclude some memory from ddr for Linux, but M4 must have to access to that memory, because M4 needs to store about 40 Mb, but not RETRAM or SYSRAM doesn't allow it. So, I try to store this in ddr, but I don't want that Linux can use this memory region.

I try to use reserved memory in Linux dts like that:

in root node in stm32mp157a-dk1.dts

memory@c0000000 {

      reg = <0xc0000000 0x20000000>;

    };

  

    reserved-memory {

      #address-cells = <1>;

      #size-cells = <1>;

      ranges;

m4ddr: m4ddr@0xd7ffffff {

         reg = <0xd7ffffff 0x4000000>;

         no-map;

       };

...

And in m4 node I added this region to memory-region:

&m4_rproc {

 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,

        <&vdev0vring1>, <&vdev0buffer>, <&m4ddr>;

    mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;

    mbox-names = "vq0", "vq1", "shutdown";

    interrupt-parent = <&exti>;

    interrupts = <68 1>;

    interrupt-names = "wdg";

    recovery;

    status = "okay";

  };

After that, in Linux /proc/meminfo I don't see this 64 Mb, it's ok, but m4 cann't use this region too.

How can I reserved memory for M4?

[Olivier GALLIEN]

Hi @VKare.1​ 

Please refer to already answered post regarding DDR access by M4 :

https://community.st.com/s/question/0D50X0000ARQwYt/where-would-be-placed-instruction-code-for-cortexm4-core-inside-stm32mp1would-m4-access-external-ddr-to-fetch-instruction-is-there-possibility-for-m4-code-to-be-placed-in-internal-sdramis-there-any-limitation-regarding-the-size-of-m4-code

Olivier

[VKare.1]

Thank you, Olivier, for answer.

[PatrickF]

Hello,

If it is to share big data with Linux, it is not possible to use DDR directly from Cortex-M4 (although from HW perspective, the data path exist, that's will create a lot of issue for Linux SW and DDR performances), please have a look to this way of exchanging large buffers in DDR : https://wiki.st.com/stm32mpu/wiki/Exchanging_buffers_with_the_coprocessor

[VKare.1]

Thank you for your answer, Patrick. Ye, I read this article. So, if we use DMA for working with DDR from M4, will it work?

And another situation:

can we use fmc nand or nor with M4? For example, eval board has nand. Can M4 work with it without problems?

[PatrickF]

Hello,

FMC is usable by M4 only if not defined at all to be used by Linux (i.e it could not be shared).

Note that FMC performance for M4 is very poor only suitable for data storage (no M4 code Fetch).

For Cortex-M4, there is no NAND support provided in CubeMP1, only FMC PSRAM-like access is provided.

When you talk about NOR, I assume it is QUADSPI Serial-NOR, which have similar system constrains than FMC (no sharing with Linux, poor perf for M4, only data).

Regards.