STM32MP157C: boot hangs after listing clocks

[rhaberkorn]

Hello community!

I am trying to port a firmware for a Seeed Odyssey SOM-based board from Hardknott to Mickledore. This uses meta-st-odyssey and meta-st-stm32mp (openstlinux-6.1-yocto-mickledore-mpu-v24.06.26). I have it booting fine on the development board, but hanging on the production hardware, which re-muxes quite a few pins. The switch to Mickledore also meant I had to switch from the trusted to the optee boot scheme. It hangs always after listing the clocks:

NOTICE: CPU: STM32MP157CAC Rev.B
NOTICE: Model: ******
INFO: PMIC version = 0x20
INFO: Reset reason (0x214):
INFO: IWDG2 Reset (rst_iwdg2)
INFO: FCONF: Reading TB_FW firmware configuration file from: 0x2ffe2000
INFO: FCONF: Reading firmware configuration information for: stm32mp_io
INFO: FCONF: Reading firmware configuration information for: stm32mp_fuse
INFO: Using SDMMC
INFO: Instance 1
INFO: Boot used partition fsbl1
NOTICE: BL2: v2.8-stm32mp1-r2.0(debug):lts-v2.8.15-dirty(567af710)
NOTICE: BL2: Built : 00:51:33, Jan 26 2024
INFO: BL2: Doing platform setup
INFO: RAM: DDR3-DDR3L 16bits 533000kHz
INFO: Memory size = 0x20000000 (512 MB)
INFO: BL2: Loading image id 1
INFO: Loading image id=1 at address 0x2ffff000
INFO: Image id=1 loaded: 0x2ffff000 - 0x2ffff1ea
INFO: FCONF: Reading FW_CONFIG firmware configuration file from: 0x2ffff000
INFO: FCONF: Reading firmware configuration information for: dyn_cfg
INFO: FCONF: Reading firmware configuration information for: stm32mp1_firewall
INFO: BL2: Loading image id 4
INFO: Loading image id=4 at address 0xde000000
INFO: Image id=4 loaded: 0xde000000 - 0xde00001c
INFO: OPTEE ep=0xde000000
INFO: OPTEE header info:
INFO: magic=0x4554504f
INFO: version=0x2
INFO: arch=0x0
INFO: flags=0x0
INFO: nb_images=0x1
INFO: BL2: Loading image id 8
INFO: Loading image id=8 at address 0xde000000
INFO: Image id=8 loaded: 0xde000000 - 0xde0328a8
INFO: BL2: Skip loading image id 9
INFO: BL2: Loading image id 2
INFO: Loading image id=2 at address 0xc0500000
INFO: Image id=2 loaded: 0xc0500000 - 0xc0519590
INFO: BL2: Skip loading image id 16
INFO: BL2: Loading image id 5
INFO: Loading image id=5 at address 0xc0100000
INFO: Image id=5 loaded: 0xc0100000 - 0xc0214bc0
NOTICE: BL2: Booting BL32
INFO: Entry point address = 0xde000000
INFO: SPSR = 0x1d3
I/TC: Early console on UART#4
I/TC:
I/TC: Embedded DTB found
I/TC: OP-TEE version: 3.19.0-dev (gcc version 12.3.0 (GCC)) #6 Fri Oct 14 19:00:05 UTC 2022 arm
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html
I/TC: Primary CPU initializing
I/TC: Override the OTP 18: 0x7ae00000 to 0x7ae001e0
I/TC: WARNING: Embeds insecure stm32mp_provisioning driver
I/TC: Platform stm32mp1: flavor PLATFORM_FLAVOR - DT stm32mp157c-odyssey.dts
I/TC: OP-TEE ST profile: system_services
I/TC: DTB enables console (non-secure)
I/TC: Primary CPU switching to normal world boot
pinctrl_stm32 pinctrl@50002000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
serial_stm32 serial@40010000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19


U-Boot 2022.10-stm32mp-r2-dirty (Oct 03 2022 - 19:25:32 +0000)

stm32_smc: Failed to exec svc=82001003 op=1 in secure mode (err = -1)
stm32_smc: Failed to exec svc=82001003 op=1 in secure mode (err = -1)
CPU: STM32MP157C?? Rev.B
Model: *****
Board: stm32mp1 in trusted mode (metratec,stm32mp157c-*****-production)
stm32_smc: Failed to exec svc=82001003 op=1 in secure mode (err = -1)
DRAM: 512 MiB
Clocks:
- MPU : 650 MHz
- MCU : 208.878 MHz
- AXI : 266.500 MHz
- PER : 24 MHz
- DDR : 533 MHz

Actually, I would usually have to touch the clocks as well for my ethernet setup, but I commented that out just to debug the startup process. You can also ignore the "serial_stm32 serial@40010000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19" error. It's apparently caused by me trying to configure uart4's muxing in uboot, which is probably unnecessary since it's already done by TF-A. Enabling uboot debug logging as in

CONFIG_LOG_MAX_LEVEL=7
CONFIG_LOG_DEFAULT_LEVEL=7
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_STM32=y

does not result in anything new being printed after the clocks. Actually I am not sure we're hanging in uboot, as a successful boot on the development board continues with optee-related messages after listing the clocks:

NOTICE: CPU: STM32MP157CAC Rev.B
NOTICE: Model: *****
INFO: PMIC version = 0x20
INFO: Reset reason (0x15):
INFO: Power-on Reset (rst_por)
INFO: FCONF: Reading TB_FW firmware configuration file from: 0x2ffe2000
INFO: FCONF: Reading firmware configuration information for: stm32mp_io
INFO: FCONF: Reading firmware configuration information for: stm32mp_fuse
INFO: Using SDMMC
INFO: Instance 1
INFO: Boot used partition fsbl1
NOTICE: BL2: v2.8-stm32mp1-r2.0(debug):lts-v2.8.15-dirty(567af710)
NOTICE: BL2: Built : 00:51:33, Jan 26 2024
INFO: BL2: Doing platform setup
INFO: RAM: DDR3-DDR3L 16bits 533000kHz
INFO: Memory size = 0x20000000 (512 MB)
INFO: BL2: Loading image id 1
INFO: Loading image id=1 at address 0x2ffff000
INFO: Image id=1 loaded: 0x2ffff000 - 0x2ffff1ea
INFO: FCONF: Reading FW_CONFIG firmware configuration file from: 0x2ffff000
INFO: FCONF: Reading firmware configuration information for: dyn_cfg
INFO: FCONF: Reading firmware configuration information for: stm32mp1_firewall
INFO: BL2: Loading image id 4
INFO: Loading image id=4 at address 0xde000000
INFO: Image id=4 loaded: 0xde000000 - 0xde00001c
INFO: OPTEE ep=0xde000000
INFO: OPTEE header info:
INFO: magic=0x4554504f
INFO: version=0x2
INFO: arch=0x0
INFO: flags=0x0
INFO: nb_images=0x1
INFO: BL2: Loading image id 8
INFO: Loading image id=8 at address 0xde000000
INFO: Image id=8 loaded: 0xde000000 - 0xde0328a8
INFO: BL2: Skip loading image id 9
INFO: BL2: Loading image id 2
INFO: Loading image id=2 at address 0xc0500000
INFO: Image id=2 loaded: 0xc0500000 - 0xc0519258
INFO: BL2: Skip loading image id 16
INFO: BL2: Loading image id 5
INFO: Loading image id=5 at address 0xc0100000
INFO: Image id=5 loaded: 0xc0100000 - 0xc0214bc0
NOTICE: BL2: Booting BL32
INFO: Entry point address = 0xde000000
INFO: SPSR = 0x1d3
I/TC: Early console on UART#4
I/TC:
I/TC: Embedded DTB found
I/TC: OP-TEE version: 3.19.0-dev (gcc version 12.3.0 (GCC)) #3 Fri Oct 14 19:00:05 UTC 2022 arm
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html
I/TC: Primary CPU initializing
I/TC: Override the OTP 18: 0x7adc0000 to 0x7adc01e0
I/TC: WARNING: Embeds insecure stm32mp_provisioning driver
I/TC: Platform stm32mp1: flavor PLATFORM_FLAVOR - DT stm32mp157c-odyssey.dts
I/TC: OP-TEE ST profile: system_services
I/TC: DTB enables console (non-secure)
I/TC: Primary CPU switching to normal world boot
pinctrl_stm32 pinctrl@50002000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19


U-Boot 2022.10-stm32mp-r2-dirty (Oct 03 2022 - 19:25:32 +0000)

stm32_smc: Failed to exec svc=82001003 op=1 in secure mode (err = -1)
stm32_smc: Failed to exec svc=82001003 op=1 in secure mode (err = -1)
CPU: STM32MP157C?? Rev.B
Model: ******
Board: stm32mp1 in trusted mode (metratec,stm32mp157c-*****-dev)
stm32_smc: Failed to exec svc=82001003 op=1 in secure mode (err = -1)
DRAM: 512 MiB
Clocks:
- MPU : 650 MHz
- MCU : 208.878 MHz
- AXI : 266.500 MHz
- PER : 24 MHz
- DDR : 533 MHz
optee optee: OP-TEE: revision 3.19 (afacf356)
Core: 302 devices, 36 uclasses, devicetree: board
WDT: Started watchdog@5a002000 with servicing (32s timeout)
NAND: 0 MiB
MMC: STM32 SD/MMC: 0, STM32 SD/MMC: 1
Loading Environment from MMC... Invalid ENV offset in MMC, copy=0
In: serial
Out: serial
Err: serial
...

From there it continues normally within uboot. Enabling debug messages in optee (ST_OPTEE_DEBUG_LOG_LEVEL = "4"; ST_OPTEE_CORE_DEBUG = "y") does not give any new messages after listing the clocks, either. But it does result in debug messages earlier, so I guess that the stdout-path works in optee.

So my question is, how could I debug this issue? How can I even know whether the problem is in the uboot or optee device trees?

[Olivier GALLIEN]

Hi @rhaberkorn 

Did you try to get support from Seeed. 

On ST we never claim to support Hardknott .. and Mickledore is no longer supported. 

I recommand also to ask Seeed guideline to migrate on lastest V6.1 / Scarthgap. 

Olivier 

 

 

[rhaberkorn]

---

@Olivier GALLIEN wrote:

On ST we never claim to support Hardknott

True, the meta-st-odyssey previously officially supported Dunfell. I later forward-ported the SOM patches to Hardknott and successfully used them with meta-st-stm32mp's hardknott branch. Seeed just added support for Mickledore in February 2025. I don't know why they didn't base it on a newer release in the first place. Asking them to support Scarthgap is probably futile.

Once I get it to work on Mickledore, I might try to port their patches again to a newer Yocto and meta-st-stm32mp release.