STPMIC2 Access from Cortex-M33 (Non-Secure, Read-Only) and A35 (Secure/Non-Secure)

[Ishan_Padaliya]

Dear ST Community,

We are working with the STM32MP257F-EV1 evaluation board and using the Yocto Distribution Package for our software stack.

Currently, the STPMIC2 is managed entirely by the secure world (TF-A and OP-TEE) on the Cortex-A35 side.

Our goal is to access STPMIC2 from the Cortex-M33 core running in non-secure mode with read-only access.

We would like to confirm:

• Is it possible to allow secure access from A35 (TF-A/OP-TEE) and read-only, non-secure access from M33 to the STPMIC2 simultaneously?

• If yes: could you please share the recommended steps or configuration changes to implement this?

If not:

• We are considering moving PMIC control to the non-secure world (U-Boot or Linux) instead of TF-A/OP-TEE.

• In this case, could you please provide guidance on how to disable PMIC access in the secure world and enable it in U-Boot or Linux?

• Also, does U-Boot or the Linux kernel include support for the STPMIC2 driver?

Any insights or references to relevant documentation would be greatly appreciated.

Thanks and Regards,
Ishan

[Olivier GALLIEN]

Hi @Ishan_Padaliya ,

 

What you want to achieve is supported in M33TDCID boot scheme. 

 

Our software and ecosystem offer for this support is only in Alpha program phase and require getting in touch directly with a local ST office or partner. 

In your case our partner and distributor Arrrow will be involved to support you. 

 

Olivier