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April 15, 2024
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Configuring external SRAM for STM32H743 using CubeMX

  • April 15, 2024
  • 3 replies
  • 3919 views

Dear ST Community,

 

I need to use an SRAM with the STM32H743AII6 MCU. When I try to configure the project on CubeMX, a warning appears next to the FMC line. I feel like I should fix this before going further with the configuration.

I am curious why I am getting this warning even when FMC is the only peripheral that was already configured. Has anybody experienced this before? Are there any suggestions to resolve this?

Here is a summary as background information:

  • The warning text says "Partly disabled conflict with FMC Chip Select NE1".
  • Warning stays even if I use NE 2/3/4.
  • The package is UFBGA169, and NE1 pin is available on that specific pinout.
  • CubeMX version is 6.11.0 but the issue was present with earlier versions as well.
  • A screenshot is attached below.

Thanks,

JD

cubemx_fmc.PNG

This topic has been closed for replies.
Best answer by MNapi

see my configuration I have the same chip connected to IS42S16400J-7TL (SDRAM 64 Mbit )

all is working fine 1.png

2.png

3 replies

mƎALLEm
Technical Moderator
April 15, 2024

Hello,

What message is showing when you pass the mouse cursor on the warning icon?

"To give better visibility on the answered topics, please click on ""Accept as Solution"" on the reply which solved your issue or answered your question."
jd2Author
Associate
April 15, 2024

Hi SofLit,

Here is the message:

WarningMessage.PNG

Best,

JD

mƎALLEm
Technical Moderator
April 15, 2024

Hello,

I think you can go ahead and ignore that warning. 

If you notice any missing in the FMC config in the generated code, you can notify us.

"To give better visibility on the answered topics, please click on ""Accept as Solution"" on the reply which solved your issue or answered your question."
MNapi
MNapiBest answer
Senior II
April 15, 2024

see my configuration I have the same chip connected to IS42S16400J-7TL (SDRAM 64 Mbit )

all is working fine 1.png

2.png

jd2Author
Associate
April 16, 2024

Dear MNapi and SofLit,

Thank you for your answers, you've been so helpful. I'll proceed with my design.

Best,

JD

MNapi
Senior II
April 16, 2024

if you want to use the same memory chip

you need to initialize it:

void SDRAM_Initialization_Sequence( void )
{
__IO unsigned long tmpmrd = 0;
FMC_SDRAM_CommandTypeDef cmd;
FMC_SDRAM_CommandTypeDef * Command = &cmd;

/* Step 3: Configure a clock configuration enable command */
Command->CommandMode = FMC_SDRAM_CMD_CLK_ENABLE;
Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
Command->AutoRefreshNumber = 1;
Command->ModeRegisterDefinition = 0;

/* Send the command */
HAL_SDRAM_SendCommand( &hsdram1, Command, 0x1000 );

/* Step 4: Insert 100 ms delay */
HAL_Delay( 100 );

/* Step 5: Configure a PALL (precharge all) command */
Command->CommandMode = FMC_SDRAM_CMD_PALL;
Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
Command->AutoRefreshNumber = 1;
Command->ModeRegisterDefinition = 0;

/* Send the command */
HAL_SDRAM_SendCommand( &hsdram1, Command, 0x1000 );

/* Step 6 : Configure a Auto-Refresh command */
Command->CommandMode = FMC_SDRAM_CMD_AUTOREFRESH_MODE;
Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
Command->AutoRefreshNumber = 4;
Command->ModeRegisterDefinition = 0;

/* Send the command */
HAL_SDRAM_SendCommand( &hsdram1, Command, 0x1000 );

/* Step 7: Program the external memory mode register */
tmpmrd = ( uint32_t )SDRAM_MODEREG_BURST_LENGTH_2 |
SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL | SDRAM_MODEREG_CAS_LATENCY_3 |
SDRAM_MODEREG_OPERATING_MODE_STANDARD |
SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;

Command->CommandMode = FMC_SDRAM_CMD_LOAD_MODE;
Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
Command->AutoRefreshNumber = 1;
Command->ModeRegisterDefinition = tmpmrd;

/* Send the command */
HAL_SDRAM_SendCommand( &hsdram1, Command, 0x1000 );

/* Step 8: Set the refresh rate counter */
/* (15.62 us x Freq) - 20 */
/* Set the device refresh counter */
HAL_SDRAM_ProgramRefreshRate( &hsdram1, REFRESH_COUNT );
}

and here is the code to test it.

/* USER CODE BEGIN 2 */

SDRAM_Initialization_Sequence();



/* Write data to the SDRAM memory */
for (uwIndex = 0; uwIndex < BUFFER_SIZE; uwIndex++)
{
*(__IO uint32_t*) (SDRAM_BANK_ADDR + WRITE_READ_ADDR + 4*uwIndex) = aTxBuffer[uwIndex];
}

for (uint16_t i= 0; i < BUFFER_SIZE; i++)
{
aRxBuffer[i] = 0;
}

HAL_Delay(10);

/* Read back data from the SDRAM memory */
for (uwIndex = 0; uwIndex < BUFFER_SIZE; uwIndex++)
{
aRxBuffer[uwIndex] = *(__IO uint32_t*) (SDRAM_BANK_ADDR + WRITE_READ_ADDR + 4*uwIndex);
}
/* USER CODE END 2 */

it worked fine the first time.