documentation on STM32 PWM fast mode

[dieter 123]

Posted on February 08, 2017 at 12:00

Hi

in cubeMX for any TIM PWM IO I can enable / disable 'fast mode'.

What is fast mode?

In which pdf document  would I find the description of fast mode, and register address? I am trying to find my way in all the different documentation pdfs!

Thx

#pwm #cube-mx

[Imen.D]

Posted on February 08, 2017 at 13:57

Hello

dieter.dieter

‌,

You should review your reference manual related to your device for more clarification about TIM, PWM mode and register address.

Regards

Imen

[dieter 123]

Posted on February 08, 2017 at 14:15

Hi

DAHMEN.IMEN

could you refer me to page and chapter where it is described?I am using a STM32L4x6!

I searched for 'fast mode' and 'fast-mode' in these 2 documents:

1.STM32L476xx datasheet

2. RM0351 Reference manual

I couldn't find it!

Thx

[Imen.D]

Posted on February 08, 2017 at 15:36

Hi

dieter.dieter

‌,

Fast-mode (Fm)is applicable only for I2C pins.FT_f I/O pins support Fm+ mode which is configured in the SYSCFG_CFGR1 register.

Refer to the RM0351 reference manual onpage276(System configuration controller (SYSCFG) section)for more details and in '35 Inter-integrated circuit (I2C) interface' section.

Inthe STM32L476xx

http://www.st.com/content/ccc/resource/technical/document/datasheet/c5/ed/2f/60/aa/79/42/0b/DM001088pdf/files/DM001088pdf/jcr:content/translations/en.DM001088pdf

, refer to these tables:

Table Legend/abbreviations used in the pinout table

Table STM32L476xxSTM32L476xx pin definitions

Hope this helps you.

Regards

Imen

[waclawek.jan]

Posted on February 09, 2017 at 10:01

I don't CubeMX, but this sounds like:

Reference Manual (I used RM0090 but I bet this is the same accross all STM32), Timer chapter:

Particular case: OCx fast enable:

In One-pulse mode, the edge detection on TIx input set the CEN bit which enables the

counter. Then the comparison between the counter and the compare value makes the

output toggle. But several clock cycles are needed for these operations and it limits the

minimum delay t DELAY min we can get.

To output a waveform with the minimum delay, the user can set the OCxFE bit in the

TIMx_CCMRx register. Then OCxRef (and OCx) is forced in response to the stimulus,

without taking in account the comparison. Its new level is the same as if a compare match

had occurred. OCxFE acts only if the channel is configured in PWM1 or PWM2 mode.

JW

[kurta999]

This is interesting. Anybody answer please? I'm curious too.

[ST_Doogie]

Not to resurrect a dead thread here, but for the benefit of others who stumble on this:

The accepted solution does not address the question. The OP was asking about PWM fast mode, which is covered by JW's reference manual snippet. The accepted solution is referencing a different "fast mode" pertaining to I2C clocking speeds(ie 400Khz/1Mbit). I can see how the OP was confused by this. It doesn't help that Cube calls the setting "Fast Mode" and the reference manual refers to a "fast enable" bit. It also doesn't help that many interfaces have modes with "fast" in their name, referring either to clocking speeds, or latency as the case may be. Finally, those familiar with Arduino/AVR processor PWMs which also have a "Fast Mode" will discover that STMs fast mode appears to be a different mechanism and possibly only applying to one-pulse mode. Welcome to the Wild West of MCU exploration ;)

[waclawek.jan]

> possibly only applying to one-pulse mode

No, they are completely mutually independent features.

> Welcome to the Wild West of MCU exploration

...as in the vast prairies of the manuals?

JW

 

[PDvor.2]

I ´ve been searching for this and I found that Fast mode tab in timer setting in CubeMX mean this:

Bit 2 OC1FE: Output Compare 1 fast enable
This bit decreases the latency between a trigger event and a transition on the timer output.
It must be used in one-pulse mode (OPM bit set in TIMx_CR1 register), to have the output
pulse starting as soon as possible after the starting trigger.
0:CC1 behaves normally depending on counter and CCR1 values even when the trigger is ON. The minimum delay to activate CC1 output when an edge occurs on the trigger input
is 5 clock cycles.
1:An active edge on the trigger input acts like a compare match on CC1 output. Then, OC is set to the compare level independently of the result of the comparison. Delay to
sample the trigger input and to activate CC1 output is reduced to 3 clock cycles. OC1FE
acts only if the channel is configured in PWM1 or PWM2 mode.

[waclawek.jan]

@PDvor.2,

Yes, that's essentially the same answer than what I've written some 7 years ago, quoted from a different part of the TIM chapter.

It even has the same idiotic remark on the one-pulse mode.

But it also highlights, that clicking CubeMX does not replace reading the RM; contrary, you have to do both and then also find out the undocumented relationships.

JW