STM32CubeMX always enables UART5 interrupt

[Vandermyer]

Hi All!

Using STM32CubeMx 6.11.1, and the STM 32L475 processor, I have successfully configured UART 5 to use DMA with interrupts on TX and just interrupts (no DMA) on receive. But whatever I do, STM32Cube seems to generate these lines:

/* UART5 interrupt Init */
HAL_NVIC_SetPriority(UART5_IRQn, 10, 0);
HAL_NVIC_EnableIRQ(UART5_IRQn);

which I don't want - enabling the interrupts before certain initialization is not what I want. On the NVIC category, and tab 'Code generation' I have unchecked the 'Generate Enable in Init':

I have tried removing the use of DMA but still get this interrupt initiailization.

Any ideas on what could be happening and how I can stop this interrupt initialization occuring?

Thanks.