Why DSI clock can't set to more than 500M in STM32H747?

[Zhou JianQiang]

Hi 
When I try to set DSI clock more than 500M, the STM32cubemx will display an error message "dsi clock source frequency must be =< 62MHz" as below. But it said STM32H747 DSI clcok can reach 1Ghz in datasheet.

I use 25Mhz HSE and attach STM32cubemx project for reference.

 

[Tesla DeLorean]

Because it's the data across multiple lanes that can get to 1 Gbps

2-Lanes, clocking at 500 MHz each, the DSI clock on the wire is 250 MHz, with data lanes clocking on BOTH edges

The 62 MHz is the pixel clock, for a 16 or 24-bit load, the LTDC delivers words to the DSI, the DSI moves it a bit/lane over the wire.

16 x 62 = 992 bps

I suspect 16 x 62.5 = 1000 bps is the functional limit, or close too it.

The 24-bit colour depth the maximum pixel clock is closer to 41.67 MHz

If you don't like the limits the auto-gen tools apply, stop using them, and use your interpretation of the reference manual and the peripheral mechanics.

https://www.st.com/resource/en/application_note/an4860-introduction-to-dsi-host-on-stm32-mcus-and-mpus-stmicroelectronics.pdf#page=75

https://www.st.com/resource/en/product_training/STM32L4Plus_Peripheral_DSIHOST.pdf

 

[Zhou JianQiang]

Hi Tesla:

Thank you for your reply.

>Because it's the data across multiple lanes that can get to 1 Gbps

-->but as showing datasheet DS12930(https://www.st.com/content/ccc/resource/technical/document/datasheet/group3/99/a2/f9/3c/27/bc/48/a8/DM00602212/files/DM00602212.pdf/jcr:content/translations/en.DM00602212.pdf), per lane speed can reach 1 Gbps, not multiple lanes.

>I suspect 16 x 62.5 = 1000 bps is the functional limit, or close too it.

-->I think it would be better if it was officially confirmed, so let's wait for ST's answer.

>If you don't like the limits the auto-gen tools apply, stop using them, and use your interpretation of the reference manual and the peripheral mechanics.

-->The cubemx can save many time when starting a new project, I am just confused with this limitation.

 

 

[TDK]

This is the input clock to the DSI, not the speed of the output which is much higher.

@Tesla DeLorean explains it nicely here:

STM32H7 MIPI DSI maximum clock speed? - STMicroelectronics Community

[Zhou JianQiang]

Hi TDK:

It says 1 Ghz max here, so I think it still has something wrong here.

And in thread you mention, the VCO 2000 is red, but now it is't

 

[Zhou JianQiang]

Hi @mƎALLEm :

Can you help confirm this question?

[mƎALLEm]

It will be handled by CubeMx team.

[Zhou JianQiang]

Hi @mƎALLEm :

Any update?

[Zhou JianQiang]

Hi @Souhaib MAZHOUD :

Can you help confirm this question?

[Souhaib MAZHOUD]

Hello @Zhou JianQiang 

This issue has been raised to the concerned team for review (Internal ticket number: 206060). I will get back to you as soon as I have any updates.

KR,

Souhaib

[Zhou JianQiang]

Hi @Souhaib MAZHOUD :

Do you have any update?

[TDK]

Expect it to take a few weeks at least.

Position yourself so that you are not dependent on fast updates to CubeMX but rather are self-sufficient to ensure success. Look at the release schedule for the past few builds. Expect that it will take at least this much time.