FCCU configuration

[stefanodimascio9]

Posted on November 14, 2015 at 15:56

Hello everybody, 

I'm using the SPC56EL70L5.Trying to configure the FCCU, I coded:

&sharpdefine CTRLK_OP1 0x913756AF   

&sharpdefine CTRLK_OP2 0x825A132B     //keys needed for operation

&sharpdefine CTRL_OPR1 1    

&sharpdefine CTRL_OPS3 3   

uint32_t FCCU_CONFIG_STATE(void){

    /* ----------------- CONFIG State --------------------- */

    FCCU.CTRLK.R = CTRLK_OP1; /* Key for the operation OP1 */

    FCCU.CTRL.R = CTRL_OPR1;  /* Set the FCCU into the CONFIG state [OP1] */

    while(FCCU.CTRL.B.OPS != CTRL_OPS3);   /* wait for the completion of the operation */

    return 1;

}

But condition is never verified: FCCU.CTRL.OPS is 0x02 (that means operation is aborted) and MCU hangs in the while.

Where is the mistake?

Thanks in advance for the help.

#leopard #fccu #spc56

[Erwan YVIN]

Posted on November 17, 2015 at 11:06

Hello Stefano ,

your FCCU configuration seems to be locked

OP1 (CONFIG command) execution when FCCU state ≠ NORMAL or configuration locked

the RM is not clear about that.

I am checking in my side.

                        Best Regards

                                    Erwan

[Erwan YVIN]

Posted on November 17, 2015 at 11:37

Hello Stephano ,

could you try this application note ?

it should help you

http://www.st.com/web/en/resource/technical/document/application_note/DM00057153.pdf

         

           Best regards

                         Erwan

[Erwan YVIN]

Posted on November 17, 2015 at 11:43

Hello Stephano ,

in the application note : the CFG Timout is increasing into ~8ms

FCCU.CFG_TO.R = 0x7;
/* Set Timer Out CCONFIG STATE to 8.192 ms */

Could you try this ?? BR Erwan

[stefanodimascio9]

Posted on November 17, 2015 at 12:23

Yes, i'm already using it and it's very useful.

I think I partially solved my problems (please correct me if I'm wrong): I assumed that debugger would stop timeouts too, but if I execute the code step by step I will get the error. Executing all instructions without breaks in between seems to work with correct configuration.

I've another side issue that I'm trying to solve, I'll ask you later if i will not be able to solve that.

Thanks for the help and for the prompt reply.

[Erwan YVIN]

Posted on November 17, 2015 at 14:16 Hello Stefano , Could you try to reset the status by setting OP15 before to go in CONFIG mode?

#define CTRLK_OP1 0x913756AF 
#define CTRLK_OP2 0x825A132B //keys needed for operation
#define CTRL_OPR1 1 
#define CTRL_OPS3 3 
#define CTRL_OPS15 15
uint32_t FCCU_CONFIG_STATE(
void
){
/* 01111 Clear the operation status (OPS = Idle, NVML = 0) [OP15]. */

FCCU.CTRL.R = CTRL_OPR15;

/* ----------------- CONFIG State --------------------- */
FCCU.CTRLK.R = CTRLK_OP1; 
/* Key for the operation OP1 */
FCCU.CTRL.R = CTRL_OPR1; 
/* Set the FCCU into the CONFIG state [OP1] */
while
(FCCU.CTRL.B.OPS != CTRL_OPS3); 
/* wait for the completion of the operation */
return
1;
}

Best Regards Erwan

[stefanodimascio9]

Posted on November 17, 2015 at 14:42

Thanks for the suggestions, but behaviour keeps the same as I described even using the suggested improvements.

[stefanodimascio9]

Posted on November 18, 2015 at 11:05

The other problem that is troubling me a lot is that, even following indications about ''FCCU critical fault injection (no NMI assertion)'' in the application note, the system does not successfully recover. After the injection there is a reset and a successful assertion of SAFE state in ME_GS, but then MCU hangs during the following while in osal.c

#if !defined(__DOXYGEN__)

__attribute__((weak, noreturn))

#endif

void osalSysHalt(const char *reason) {

  osalIsrDisable();

  osal_halt_msg = reason;

  while (1);

  }

with the reason 0x1F50 ->  ''clock failure''.

I have done several tries but I can't fix it and I have basically no documentation about that.

Thanks in advance for the help.

[Erwan YVIN]

Posted on November 24, 2015 at 11:40

Hello Stefano ,

i confirm that using the debugger (step by step) during the  FCCU configuration is goint to generate OPS Aborted.

About your issue , could you send me your stack function and your code example (SPC5Studio Example) ?

   Best Regards

               Erwan

[stefanodimascio9]

Posted on November 24, 2015 at 13:29

Thanks, your confirmation really helps me to gain confidence with the device.

I attached the code I'm using and the call stack when the hang occurs (please warn me if this is not what you asked for, I'm not sure)

Thanks again for the help.

________________

Attachments :

main.c : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I0J2&d=%2Fa%2F0X0000000baB%2FCbM1Hc51zKNrwoMWG2oBaVAOtRKroIB9FD218ZGfHvo&asPdf=false

screen.png : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I0Xq&d=%2Fa%2F0X0000000baD%2FZbCLQuewBPbIgP7i0mIc5O7SCGBlBwOEj.cJVh4c6T4&asPdf=false

[Erwan YVIN]

Posted on November 24, 2015 at 16:22

Hello Stephano ,

the assert happenned because of in spc_clock_init() in SAFE Mode

the DRUN State is waited.

/* The system must be in DRUN mode on entry, if this is not the case then

it is considered a serious anomaly.*/

if
(ME.GS.B.S_CURRENT_MODE != SPC5_RUNMODE_DRUN) {
SPC5_CLOCK_FAILURE_HOOK();
}

according to the figure 305,

it is not needed to reinitialize again the clock

it is not a destructive reset.

in the configuration.xml , you should add :

(Cf Screenshot)

for the Pre-Clock Initialization Code

if (ME.GS.B.S_CURRENT_MODE != 2) {

Post-Clock Initialization Code :

{

with this patch, i think that your test is PASSED ;)

Best regards

Erwan

________________

Attachments :

2015-11-24_160925.png : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I0Xg&d=%2Fa%2F0X0000000baE%2FbOJkN70eJVdNIcviTP0lJ7gf2M4bTv6Oi5Zr19ndJpQ&asPdf=false