STM32 MCUs Products

Hi all: I have a general question about whether STM32 peripherals need to be clocked permanently. I am using an STM32G0 at the moment, and I am disabling the USB C Power Delivery "Dead Battery" feature, in order to make sure that the internal 5k1 pull-downs on the UCPDx_CCx pins (PA8, PB15, PD0, PD2) are disabled: LL_SYSCFG_DisableDBATT( LL_SYSCFG_UCPD1_STROBE | LL_SYSCFG_UCPD2_STROBE ); Nothing indicates that you need to clock any peripheral to do that, but LL_SYSCFG_DisableDBATT() writes to SYSCFG->CFGR1, so I am guessing that you need to clock SYSCFG: LL_APB2_GRP1_EnableClock( LL_APB2_GRP1_PERIPH_SYSCFG ); However, other people also clock PWR. I may be because other families STM32G4 and STM32L5 disable those pull-down resistors in a different way: PWR->CR3 |= PWR_CR3_UCPD_DBDIS; // See LL_PWR_DisableUCPDDeadBattery(). So I wonder whether clocking PWR is necessary on the STM32G0 to do that task. The code which STM32CubeMX generates for the STM32G0 does clock PWR too, probably b

 I have had a board assembled and want to check they have fitted the STM32 in the correct orientation.  Pin 1 on the PCB is shown by the white triangle. But it’s not clear from the package where pin one is because there are two circles in opposite corners in the photo. The datasheet only shows one circle to identify pin 1…   

HI I AM FACING ISSUE WITH TIMER SYNC WITH SAME LENGTH TIM2 MASTER ANDTIM8 SLAVE HAL_TIM_PWM_Start_DMA(&htim2, TIM_CHANNEL_4, (uint32_t *)gPWMData1, gPWMData1LastIdx); // IN THIS SAME ARRAY PWM ALWAYS GENERATED IN DMA HAL_DMA_Start_IT(&hdma_tim8_up, (uint32_t)&gPWMData2[row], (uint32_t)&(GPIOB->BSRR), gPWMData2LastIdx);//IT HAS TO BE IN SYSNC WITH TIM2TIM2 START--------UEVTIM2 (AFTER TIM2 DMA FINISH WAIT FOR DMA COMPLETION IN WHILE   WE STOP IT LATENCY OCCURS)THEN TIM8STARTS-----WE HAVE TO WAIT IN WHILE FOR DMA  TO COMPLETE THEN AGAIN WE START TIM2 ISSUE IS IN NORMAL DMA ABOVE IS WORKING BUT I  AM REQUIRING IT IN CONTINUOUS MANNER WITHOU TCPU INTERVENTION LOOKS TO BE COMPLEX PROBLEM TO ME 

Hi all,I'm having trouble debugging using STLINK when the STM32U031C8U6 microcontroller is in stop mode or running at a low frequency clockI already tried to:enable in the STM32CubeIDE the "Debug in low power modes" option (Debug Configuration, Debugger tab)call the HAL_DBGMCU_EnableDBGStopMode() function at the begin of application. Issue #1Attached is a minimal project that reproduces the problem I'm having using the low-power timer peripheral. I'd like to use it to exit stop mode every 2 ms or every 10 ms based on some conditions, which I've simulated here with the state of a push button.The project works correctly if I use the STLINK debugger to flash the microcontroller and then disconnect it to run in standalone mode.However, I experience an unexpected behavior when running it in debug mode with STLINK debugger.The microcontroller runs at a 16 MHz HSI clock and the LPTIM1 peripheral uses an external 32.768 kHz crystal.Looking at the main() function, you can see that aft

 

The STM32F107Vx has 2 CAN interfaces.In the TRM RM0008 Rev 21 dated February 2021 on page 115 I can only find one entry to enable the CAN clock, bit 25. What CAN clock does this bit enable? CAN1, CAN2 or both? Or does the reserved bit 26 enable CAN2 and bit 25 CAN1?I could not find any additional information (documentation) answering these questions. Died I miss something?regards, Felix

Hi, I'm using an STM32L431CCU6TR in a low power application, which uses a system basis chip to control the voltage rails to the system.  After a predetermined timeout period, the SBC cuts VDD from the STM32, and can only be woken by an external influence (eg. CAN data, toggling wake up line via user button, etc) A peripheral of the STM32 has a control line which periodically applies a very light pullup (in the order of uA) to the line to check the state of the PIN.  The SMT32 (when powered) pulls this line LOW  to activate the peripheral, or allows it to float to disable the peripheral.The problem is, on some PCB assemblies, when the STM32 is unpowered, the line appears to be clamped to around 0.68V.  So when the peripheral device attempts to pull the line HIGH and check its state, the MCU holds it near a LOW state, and the peripheral is inadvertently activated.AN4899 suggests there are no clamp diodes on this pin (PB8).  Thus, I believe it should be

I'm experiencing a very, very strange behavior when running debug sessions in STM32CubeIDE. Sequential sessions alternate between correct execution of my main() entry point (and execution stops there, as expected) and unexpected entry into the bootloader.Everything has worked absolutely correctly up until just a few days ago. Before that, I last compiled and programmed firmware maybe a week and a half ago. I made a git branch at that point to capture the state of the software prior to making changes for a new PCB revision. Now, after experiencing this issue with new code, I've even switched back to that historical branch, and that now also exhibits the issue. I've also rebooted and power cycled my programmer and boards. I have two PCBs, and they both behave the same way.I'm using STM32CubeIDE v. 1.19.0 build 25607_20250703_0907.Target is an STM32L431CC (CCT6). Program/debug is via an ST-LINK/V2 and SWD. Nothing has changed in my debug configuration (and reset behavior is "con

The power supply scheme indicates to use 100nf for vref and vdd, but in the General PCB design guildines section (Figure 51 and 52) indicates that 10nf power decoupling capacitor should be placed. I am confused which capacitor is suggested for adc decoupling. Thanks. 

should the pullups on JTAG should be given for JTAG in STM32H757XIH6, also are there any extra consideration taken care while using ARM JTAG. If pullup is not necessary, why is it so.

Split from:https://community.st.com/t5/stm32-mcus-products/is-is-possible-to-wakeup-the-stm32l496-with-an-external/td-p/741267as this is a new question.Hello @STTwo-32 as the wake up pin associated with stm32L496 is SYSWKUP2 can i use this and on clicking the B1 (i.e. on board button) kindly let me know will the system gets woken up,  also i cannot able to make my system to sleep mode even after using the HAL_EnableSLEEPmode(); function, i also tried using __RCC_HAL_DISABLE_A_PORT(not sure if it exactly matches with HAL macros) for disabling clock individually to every port of the board still it is not going to sleep mode.  

I tried to use internal RTC with LSE clocking in device which has GSM/GPRS module (GSM part decoupled from MCU part by ferrite beads in power lines and resistors in data lines). In first PCB revision (no separate ground region under crystal) I noticed significant RTC slowdown at GPRS transactions (0.2-0.4 seconds at each GPRS data transaction, when I soldered wires to GSM part ground and VCC pads - clock slowdown is increased). I've fixed board layout according to design recommendations (separate ground regions, ground traces around quarts lines, extra ferrite bead in CPU power line) but it doesn't affect clock instability at all.Vcc is decoupled to ground after ferrite bead by 22pF and 100nF capacitors, before ferrite bead there's a 100uF tantalum capacitor after LDO. Vbat is decoupled by 100nF capacitor and 2x22pF capacitors (there are places for different external RTC modules). Quartz is one with 12.5pF load, load capacitors are 22pF each (I experimented with smaller values - nothin

Hello,Our board has an STM32N657 MCU connected to an IS21S08GA eMMC.We use an 8-bit bus, and SDMMC1 is configured to run at 32 MHz.In polling mode, read/write operations work, but are very slow — it takes about 1–2 ms to read or write a single block (512 bytes).I want to switch to DMA, but I’ve encountered a strange problem.As far as I know, on the STM32N6 series, the SDMMC peripheral works with IDMA, so we can't use GPDMA or HPDMA — is that correct?IDMA seems to work — the callbacks are called and no errors are reported.However, I can't read the same data I wrote.It seems the data isn't actually read at all (or possibly not written either).Note that I am using SCB_CleanDCache and SCB_InvalidateDCache as needed. I also tried disabling the D-Cache entirely — no change.Does anyone have experience with eMMC and IDMA on STM32N6?I would greatly appreciate any guidance or advice.

Hi,I am trying to solve a strange programming related problem I am now having after updating the reset circuit of my STM32F439-based board. Below is a comparison between my old and my new circuit:The reason I made these changes is because this is a large board which resulted in noise pickup issues on the on the very long nRESET trace when it was just "floating high". My plan was to solve that by actively driving it high instead. I also wanted to add a feature where I could use one of the MCU's GPIO pins to trigger a full board (not just MCU) reset programmatically by pulling the nRESET signal low.The changes seem to have fixed the two problems I had but have now introduced a new problem where I cannot program the board easily with an ST-Link (V3 MINIE) anymore. I normally use probe-rs for programming, but have verified that the official STM32CubeProgrammer shows very similar issues.When I try to program with "connect under reset", then it seems that the ST-Link almost never drives

Currently, I have a project using a secure application for the STM32N6570-DK. I am able to run and debug the FSBL and Application with the system in Dev Boot, but have yet to be able to attach and debug when booting from the external flash (Boot1 and Boot0 both LOW).I have placed the following code toward the beginning of my FSBL, and configured my  STM32CubeIDE debug to not load the program, and the not reset the chip when attaching for debug. However, I am still unable to attach and debug the system. __HAL_RCC_BSEC_CLK_ENABLE(); BSEC->AP_UNLOCK = 0xB4; BSEC->DBGCR = 0xB4B4B400; __asm("bkpt 255"); Has anyone been able to debug their application with the MCU booting from external flash?

Hi,I've flashed an application in the STM32N6570-DK board using a FSBL and Appli projects. The application boots fine.But when the application is running, I can't attach to it using the debugger and ST-Link.I've tried to open the debug port of the STM32N6 by writing 0xB4 to the BSEC_AP_UNLOCK register, but it still fails.The error I get is:STMicroelectronics ST-LINK GDB server. Version 7.11.0 Copyright (c) 2025, STMicroelectronics. All rights reserved. Starting server with the following options: Persistent Mode : Disabled Logging Level : 1 Listen Port Number : 61234 Status Refresh Delay : 15s Verbose Mode : Disabled SWD Debug : Enabled Target unknown error 32 Error in initializing ST-LINK device. Reason: Unknown. Please check power and cabling to target.Using STM32CubeProgrammer, I get this error on Access Port 1 with Hot Plug mode:But I've not configured anything: I've not blown any OTP fuse, nor changed any Option bytes. And I'm not using a secure bootloa

Hello.. can anyone advise the SWD pin for F767? and how these are connected to F767? PA13 PB3? Any schematic will be great !! I'm using it for debugging. Can anyone advise? 

Using Nucleo-H753ZITrying to write to SD card using:  FATFS FatFs; FIL file; FRESULT FR_Status; FATFS *FS_Ptr; FR_Status = f_mount(&FatFs, SDPath, 1); if (FR_Status != FR_OK) { printf("Error! While Mounting SD Card, Error Code: (%i)\r\n", FR_Status); } else{ printf("SD Card Mounted Successfully! \r\n\n"); } static char hello_world[] ="hello world"; UINT bytesWritten; if(HAL_SD_GetCardState(&hsd1) != HAL_SD_CARD_TRANSFER) { printf("Card not ready\n"); } FR_Status = f_open(&file, "hello_world.txt", FA_WRITE | FA_CREATE_ALWAYS); //tried 0:/ and / infront of hello_world.txt FR_Status = f_write(&file, hello_world, sizeof(hello_world), &bytesWritten); FR_Status = f_close(&file);The SDMMC peripheral is initialized in 4 bit mode and using a 20MHz clock.Error occurs in stm32h7xx_hal_sd.c at:It goes through the first sets of the for loops find then start going between the first if statement and the second. while (!__HAL_SD_GET_FLAG(hsd, SDMMC_FLA

Hello,Is it recommended to implement an ESD protection on SWD lines of STM32L011D3/D4 mCU? I went through "Getting started with STM32L0xx hardware development" document and there is a Figure 15 which suggests to connect SWD lines direct to programming connector without any protections. I'm just thinking that some protection would be good, like 47R - 100R resistors on the lines with 3.3 V (or 5 V ?) Vrwm of ESD diodes while programmer would not be connected to the board?Many thanks.

Hello all,This is regarding the the problem after recent development from 18MHz to 22.8 MHz of operational speed of STM as slave operating with DMA transfer and SPI mode 01. Although the data sheet suggest maximum achievable speed of 31 MHz - I made it up to 22.8 MHz, beyond which data corruption occurs. As per my recent findings there is a persistent lag between the SCK and MISO signal around 8.8 -10.4 ns. I tested the SPI communication with and without hardware NSS, also with only SPI communication shutting of other operations but this delay is still there. Please find the oscilloscope readings for the reference.tsu (NSS)tv(SO)tw(SCKH)th(SO)In oscilloscope readings GREEN is NSS (CS), BLUE is SCK(Clock) and YELLOW is MISO signal.Further checking into the data sheet I found the following information:Comparing the oscilloscope readings with the data sheet information it feels like this lag (tv(SO)) is hardware limitation and can't be decreased. And at higher frequency this delay takes m

Hi,I'm planning to use STM32H562ZI as I3C controller with an I3C v1.0 compatible Target endpoint. Since STM32 I3C IP supports I3C v1.1.1, will there be any potential issues on RSTDAA, ENTDAA, I3C Private Write, I3C Private Read or other electrical parameters with v1.0 ? Though I do not see any limitation based on v1.0 & v1.1.1 specifications (Apart from IBI mandatory byte and new CCCs), I'd like to hear from the community. Appreciate the help.Thanks,Srinath

Ive been trying to get active passthrough between my adc and dac from pa1 and pa0 respectively. Ive confirmed all my functions are being called but i just cant seem to get any value loaded into my DAC. if i give it a value manually, i get the correct value at the pin. I am putting a 2.6 VDC source at my adc pin but have failed to get anything out. I have included my main.c file. I am using the nucleo-l476rg board

I am using the  Nucleo-L433RC-P board and have configured pin PC13 as SYS WKUP (for the blue top button).How can I read the state of this pin when the processor wakes up, because HAL_GPIO_ReadPin will not work.I am sure I used a function or macro to read the state of this pin before, but can't remember how I did it.I need to distinguish between an RTC wake or a pin wake from shutdown.I use wake markers stored in an RTC backup register to detetc an RTC wake.  I write to the backup register just before calling shutdown in the function SCH_mcuSleep....void SCH_mcuSleep (void){ /* The Following Wakeup sequence is highly recommended prior to each Standby mode entry mainly when using more than one wakeup source this is to not miss any wakeup event. - Disable all used wakeup sources, - Clear all related wakeup flags, - Re-enable all used wakeup sources, - Enter the shutdown mode. */ // write value to RTC backup register to indicate mcu was in sleep HAL_RTCEx

Hello friends : )I've recently tested the NUCLEO-G491RE board for an upcoming redesign.Current design relies on quite tough interrupt latency so here is where I begun.As I understand, with no FPU usage (in isr) (ASPEN + LSPEN = 0) one could expect up to 12 SYSCLK latency.In this case 75ns at 160MHz which sounds pretty decent (today it's about 73ns). I started off by creating two very similar interrupt services I intended to toggle between.Each would pulse a output pin and trigger the other one:Attributes: 'interrupt' + optimize("-O2")' + 'section(".RamFunc")' + 'aligned(8)' + 'naked'static void onTimeStampEvent(void) { GPIOA->BSRR = 1<<12; NVIC->ISPR[1] = 1<<(39-1*32); // USART3 GPIOA->BRR = 1<<12; #ifdef NAKED __ASM volatile ("BX LR":::); #endif return; } static void onReceiveEvent(void) { GPIOB->BSRR = 1<<14; NVIC->ISPR[0] = 1<<(11-0*32); // DMA1_CH1 GPIOB->BRR = 1<<14; #ifdef NAKED __ASM volatile ("BX LR":::);

Hello team,Generally , Reset pin by default status is Logic High.But in AN4206 ( Page 31) , NRST pin is not Connected to 3.3V , it is left Floating with Capacitor.Is that Okay ? My device is STM32F303.Regards,