STM32 MCUs Products

Hello, I am working on Battery Management Project where I can use USB type-C. But I can use CCx line tie off with 5.1Kohm pull down resistor for 5V 3A. After this configuration USB Type-C consume 3A current at 5V.Please give me suggestion that how its work and how I can implement in my project.Regards,Chintan

I want ust I3C private Read as target but send only 8byte and this error to Error Handler.

Hello everyone,I'm working on a project using STM32U031, and using RTC with LSI(32kHz) to calculate elapsed time, and everything working fine, the waveform of LSI output also looks great.And I need to switching power supply in sometimes, and there could happen the frequency of LSI become weird and average frequency change to ~52kHz, so i using LSCO and MCO2 to output the LSI and HSI, the HSI working fine when LSI abnormal, just like picture blow:And here is my code to initial system clock which is copy from cubeMX:void SystemClock_Config(void) { LL_FLASH_SetLatency(LL_FLASH_LATENCY_1); while (LL_FL

Hi there!I am working on a project using an STM32G473CETx LQFP48 MCU in STM32CubeIDE.I am using TIM2 to simultaneously:1.) Generate a PWM output signal using:Channel 1 - PWM Generation CH1 - Combined PWM1 modeChannel 2 - PWM Generation No Output - Combined PWM 2 mode2.) Proving a DAC sync using theTimer 2 Trigger Out event3.) Provide a ADC sync using theTimer 2 Trigger Out event4.) Provide a GPIO DMA stream event usingTIM2_UPI am initializing everything in this sequence: HAL_DAC_Start_DMA(&hdac1, DAC_CHANNEL_1, (const uint32_t*)dac_data, 16, DAC_ALIGN_12B_R);HAL_ADC_S

I have a board that used STM32F07. I connect BOOT0 pin to GND via RES 10kOhm and left NRST pin open. At first i able to connect to STM32 and upload code but problem is after first time upload code (I use debug mode). It show STM is disconnect and after that, I can't connect to STM32 and when i measure NRST pin is turn to 0.8V(At first is 3.3V) and even i try to pull up with resistor 10kOhm, it still the same voltage 0.8V. Does anyone meet the same problem? also can anyone explain to me why it like that?

I have STM32L011 board that i make. I left NRST and BOOT0 open. And i try to upload code using ST Link V2. But seem like the ST link is not recognize the STM it always show "Target no device found". Can anyone help me identify the problem? Please..Thank you in advance.

Hello everybody,Im am currently trying to connect a STM32H753 to a AD7606B using the parallel interface (FMC) and got it working at some point where the CPU can read/write the data from/to the FMC but it needs a __DSB() before starting to use the read data or the ensure that the data have been sent to the device.That may still be tolerable given that a full 16 halfwords read takes about 3µs to complete but I want to read these data using the MDMA directly and raise a IRQ after performing X reads and, for now, the MDMA encounters the exact same problem than the CPU but it has no __DSB( ) to ensure that the first data have been read before requesting for the next one from the FMC.Any ideas how I can sync the MDMA with the FMC ?Additionnally, i would like to start the MDMA transfert from FMC to DTCM with a GPIO Pin that goes low when the 16 halfwords are ready to be read. For now i am trying to start a timer with the GPIO configured as external event, the ti

I am working on the firmware for my STM32U575 based controller board. I cannot find in the documentation an explanation about the Low/Medium/High settings on a GPIO port. I see the bits to be set, and in MX the option for choosing the setting, but I cannot find an explanation regarding when to use Low vs Medium vs High speed. What is affected by choosing the different speeds? is it rise/fall time, response time, power drive,...? I tried to find a table or something that explains the difference so I can determine whether I need to go to medium or high speed for various signals. What is the purpose of having these speed settings? 

....so says STM32F334x4/x6/x8 Errata sheet STM32F334x4/x6/x8 Rev Z device limitationsDoc is dated 2021. No answers seen on web.Has this been fixed yet?If not, will it be fixed? And if so, when?Ta lotsRex   

void SystemClock_Config(void) { // Step 1: Enable HSI RCC->CR |= RCC_CR_HSION; // Enable HSI while (!(RCC->CR & RCC_CR_HSIRDY)); // Wait until HSI is ready // Step 2: Configure the voltage scaling PWR->CR1 |= PWR_CR1_VOS_0; // Set voltage scale to 1 (VOS = 1) // Step 3: Configure the PLL RCC->PLLCFGR = 0; // Clear PLL configuration register RCC->PLLCFGR |= (1 << RCC_PLLCFGR_PLLM_Pos) | // PLLM = 1 (10 << RCC_PLLCFGR_PLLN_Pos) | // PLLN = 10 (HSI frequency * 10 = 80 MHz) (0 << RCC_PLLCFGR_PLLP_Pos) | // PLLP = 2 (DIV2) (2 << RCC_PLLCFGR_PLLQ_Pos) | // PLLQ = 2 (DIV2) (2 << RCC_PLLCFGR_PLLR_Pos) | // PLLR = 2 (DIV2) RCC_PLLCFGR_PLLSRC_HSI; // PLL source = HSI // Step 4: Enable the PLL RCC->CR |= RCC_CR_PLLON; // Enable PLL while (!(RCC->CR & RCC_CR_PLLRDY)); // Wait until PLL is ready // Step 5: Set PLL as the system clock source RCC->CFGR &= ~RCC_CFGR_SW; // Clear SW bits

I am using an STM32H7 to interface with a TI INA700 power monitor. I am using polled/blocking I2C, in particular HAL_I2C_Master_Transmit to set the register I am interested in reading, followed by HAL_I2C_Master_Receive.  This has been working fine for months, so I know that the implementation is basically correct. I am still trying to confirm (the board is not currently in my possession), but it appears the INA700 has been damaged and is not responding to I2C writes or reads with HAL_I2C_Master_Transmit and HAL_I2C_Master_Receive. When this happens, I see this operation go from taking a few ms to taking > 150 ms, even though I have the Timeout argument of both HAL_I2C_Master_Transmit and HAL_I2C_Master_Receive set to 2ms. I have reading documentation, and the documentation seems to say that the purpose of this timeout is to abort the function call if the I2C transaction doesn't complete within that time period, but I am not seeing that

I have built a board that is powered using a LiC and to conserve some power i run it under 1MHz (524KHz).I need 2 UARTs and one ADC for my application. However, since there's only 1 LPUART i use second UART to connect a cheap BLE module that i can separately power as needed.I can keep module unpowered however UART connection under 1MHz drops below 115200 ratio which i want to use. As a second option, i can use HSI 16MHz and lower it to 4MHz to reach 115200.I disable UART if i don't need it. I noticed it consumes power over tx/rx somehow.Same applies with ADC, but i don't need rapid readings from it thus keeping it sync with cpu.I am curious how it would affect consumption if i use HSI for UART. Is there any paper explaining this consumption? I keep it 9600 baud now, but if it consumes 10uA or something, i can use async HSI for UART as well.I do not use anything but MSI+LSE for this application, but consumption after enabling HSI for UART, or

Hello, I am using an STM32F103CBT as an I2C slave. A memory buffer is to be transferred via the interface. Although hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; is set, I cannot measure clock stretching and the first byte transferred is always 0xff. void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c){ HAL_I2C_EnableListen_IT(hi2c); } void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode){ HAL_StatusTypeDef hal_i2c_status = HAL_ERROR; if(TransferDirection == I2C_DIRECTION_TRANSMIT){ hal_i2c_status = HAL_I2C_Slave_Sequential_Receive_IT(hi2c, i2c_rx_buffer, 1, I2C_NEXT_FRAME); if(hal_i2c_status != HAL_OK)printf("AC Receive IT error\r\n"); }else if(TransferDirection == I2C_DIR

Hello,  USB HS is used as MSC with external PHY is running ok. Want is to reduce power, by trying low-power code gets stuck and I need help on enabling same?

I refer to than Example  en.stm32cubeh5-v1-3-0\STM32Cube_FW_H5_V1.3.0\Projects\NUCLEO-H563ZI\Examples\FLASH\FLASH_EDATA_EraseProgram   Init and Write data in 0x0900C000 is ok.But when I restart the device and read data from 0x0900C000,the program entered NMI_Handler,but if I read from 0x0900C002,It worked. If I didn't write data in 0x0900C000,I can read data successful. Is there anying wrong with the config of MPU?   That's the config of MPU static void MPU_Config(void) { MPU_Attributes_InitTypeDef attr; MPU_Region_InitTypeDef region; /* Disable MPU before perloading and config update */ HAL_MPU_Disable(); /* Define cacheable memory via MPU */ attr.Number = MPU_ATTRIBUTES_NUMBER0; attr.Attributes = 0 ; HAL_MPU_ConfigMemoryAttributes(&attr); /* BaseAddress-LimitAddress configuration */ region.Enable = MPU_REGION_ENABLE; region

Hi all, per AN3156 it states G0 series have USB DFU mode built-in the factory bootloader, so does it mean I won't have to configure the USB Device DFU Class in the CubeMX in order to make it work? Could I configure it into other classes (like CDC Virtual COM), and only need to flip the BOOT0 pin when it comes to firmware update? Thanks

Hello.I am creating a program to write data to multiple FLASH memories using the STM32C031.I have set FLASH page13,14,15 as new pages to be written, but only page13, which is the first page to be rewritten with FLASH, is rewritten, while page14 and 15 are not rewritten properly and the value is only changed to 0x00.However, if the pages to be written are page12,13,15 or page12,14,15 and one page is skipped, the contents to be written can be successfully written on three consecutive pages.At this time, the deletion and writing procedures of FLASH use exactly the same program as when it is not possible to write.Is there anything we can do to make it so that we can successfully write on three consecutive pages? Best  Regards, void Write(){ uint16_t i; __disable_irq(); huart1.Instance->CR1 &= ~0x04; FLASH_UNLOCK(); FLASH_DELETE(0x0D); for(i=0;i<256

I tried to follow exactly what was indicated in the following tutorial https://www.youtube.com/embed/JWOV4j5fCS4?cc_load_policy=1&autoplay=1&list=PL8n_tqwYdzVAd_OxaKnfxBrvcGwR8kSJo, but despite the serial port being connected, I am not receiving the data on the console that I send through the micro.What could be the cause? In the attached screenshots, you can find the settings and the code from main.c. 

I am attempting to temporarily disable Flash ECC interrupts, for the purpose of validating data stored on internal flash, and discovered that the ECC Interrupt Enable settings seem to have no effect. I am using an STM32H743, and have used the code below to intentionally trigger ECC interrupts. I experience the same interrupt (HardFault_IRQ), with the same FLASHn_SR values when a byte with an ECC mismatch is read, whether or not FLASH_CR_SNECCERRIE and/or FLASH_CR_DBECCERRIE are set. I have verified the bit settings via ST-Link/V2 ISOL debugger both before and after the interrupt occurs, and I'm using STM32CubeIDE. // CODE FOR INTENTIONALLY TRIGGERING ECC ERRORchar dummy[32];char * pointer = (char*) FLASH_BANK2_BASE;flash_eraseSector(FLASH_SECTOR_TOTAL);memset(dummy,0xAF,sizeof(dummy));HAL_FLASH_Program(FLASH_TYPEPROGRAM_FLASHWORD, FLASH_BANK2_BASE, (uint32_t)dummy);dummy[0] = *pointer; // does not t

To give a context:I'm working to implement OTA for an existing project which uses stm32f091xx.And it already contains separate bootloader(0x08000000) and application(0x08001000) with their own vector tables.Currently, when a reset occurs, the bootloader which is remapped to 0x0 will call the application at 0x08001000.Question:Both bootloader and application have their own vector table.But on the internet, I found that Cortex-M0 doesn't have a vector table offset.Just to know more about it, I tried to create a hard fault on the application and surprisingly, the hard fault is now in a location which is relative to the application and not the bootloader.This is map of the bootloader:HardFault_Handler 0x080000e3 Thumb Code 2 startup_stm32f0xx.o(.text)This is map of the application:HardFault_Handler 0x08002447 Thumb Code 2 stm32f0xx

I am new to firmware and integrated LVGL in stm32u5 dk1 board . And my elf hex file size is bigger than internal flash hence using external flash for lvgl images . Also running LVGL in external psram . After running I see first screen then it goes immediately to hardfault . Not able to understand this hardfault reason . Need help here . And I checked that PSRAM and External flash is working fine . I have copied entire code at github https://github.com/rohit-trustedwear/stm32dk1-code . the fault is happening at line bg_color.full = buf[0] + (buf[1] << 8); in#if LV_COLOR_SCREEN_TRANSPstatic inline void set_px_argb(uint8_t * buf, lv_color_t color, lv_opa_t opa){lv_color_t bg_color;lv_color_t res_color;lv_opa_t bg_opa = buf[LV_IMG_PX_SIZE_ALPHA_BYTE - 1];#if LV_COLOR_DEPTH == 8bg_color.full = buf[0];lv_color_mix_

Hello everyone,We have already created a project with working display and other functionalities using stm32F746 discovery board. But, now we wish to switch to custom PCB board and use stm32f746BET6  MCU with custom LCD display from MIDAS i.e. 5000DRT which uses 24bit RGB LTDC pinouts. Currently I have changed the LTDC parameters according to the parameters in the datasheet but no matter what changes I make the LCD displays just blank white screen.I am currently using QSPI to store the touchGFX images and SDRAM for the framebuffer.We are using Single buffer approach and have verified that the framebuffer at the defined memory location (0xC0000000) has the correct framebuffer data using debugger.Please find the attached configuration images and LCD datasheet for your reference.Please guide me for what may be missing and where I am doing something wrong.Thankyou for your time and consideration.LCD frequency = 32 MHz

Hi,Can anyone explain how DE/RDY lines are working in different directions? I am getting confused while reading the Ref manual. The RM0468 states in Table 305 the PSSI_DE is an Input which serves as " Data enable signal: data valid signal when receiving or flow control signal when transmitting", the PSSI_RDY is an output which works as  "Ready signal: flow control signal when receiving or data valid signal when transmitting" But in section 37.5.3 describing the actual signals it says:"The direction of the PSSI_DE signal is defined by the OUTEN value. It is the same as thedata direction." The same for the second line:" The direction of the PSSI_RDY signal is defined by the OUTEN (bit 31 of PSSI_CR). It is setin the opposite direction compared to the PSSI_DE and data signals. "So now I am confused: are they bidirectional or the pin functions became swaped and the physical DE  became driven by RDY and o

Dear, My customer is looking for the STM32 MCU that can connect to wifi without using an antenna, has more than 33 GPIO (Digital Output) but not too many outputs and can operate stably in an industrial environment.Please advise the possible product. Thank you.BR,Suphachai

hello friends!Now a days i started working on TouchGFX for Waveshare's OpenH7XXI-C board and CoreH7XXI MCU. I interfaced 7 inch display, FMC SDRAM as bank 2 and W25Q128 QSPI. after configuring these peripherals i tested them manually by writing and reading data to them.After that i made custom external loader (.stld) to load TouchGFX assets into QuadSPI memory. i added this .stld file in CubIDE and when im trying to dump the code im getting follwing errors for External Loader.xPSR: 0x01000000 pc: 0xfffffffe msp: 0xfffffffc Info : Unable to match requested speed 8000 kHz, using 4000 kHz Info : Unable to match requested speed 8000 kHz, using 4000 kHz Info : Running loader function Init(0x0, 0x0, 0x0, 0x0) Error: failed erasing sectors 0 to 23 Warn : keep_alive() was not invoked in the 1000 ms timelimit. GDB alive packet not sent! (1097 ms). Workaround: increase "set remotetimeout" in GDB