STM32 MCUs Products

We have implemented a total of five push buttons—two connected to Port E and three connected to Port M. The GPIOs of Port E are functioning correctly. However, the GPIOs of the push buttons on Port M are not being detected properly by the MCU.Even when the switches are unpressed, the MCU is detecting a Pressed condition.PORT M GPIO Pin out: PM1, PM2, PM3.MCU part: #STM32H7R7L8H6HI have checked  push button from hardware side, its working fine.Attached example schematic snapshot of push button. Could you please advise if there are any specific settings or configurations required for Port M GPIO to function correctly?@Shubham Prakashpant BOHARAPI @Shailesh Patil 

Hello,I am writing & erasing flash during operation, and this seems to cause a bus stall which prohibits all execution from flash during these operations.AN4808 seems to indicate that if you use a dual-bank device you can avoid this by executing out of one bank and writing/erasing out of the other. I have tried this, and still seem to experience the bus stall even when running out of Bank 1 and doing write/erase out of Bank 2.Does it make sense that this still causes a bus stall? Are there other ways around it?

Hello,I’m trying to setup the PSSI interface on the STM32H523RETx to transmit data. I cannot find how is the PSSI_PDCK configure. Neither in the clock tree nor in the RCC register the PSSI clock can be configured (except for enabling it). In RM0481 table 305 the AHB clock is listed for PSSI_HCLK, but how is PSSI_PDCK generated?Is it not possible to internally generate the clock? How is the requirement of AHB clock must be at least 2.5x PSSI_PDCK achieved?In CubeMX (v6.14.1) I also couldn’t find any parameters for the PSSI clock.Thanks!

Hello everyone In my application using an STM32H7, I noticed that the VBAT pin, with VDD off, draws 1.9 mA. This is excessive current draw.I'm using a CR2032 battery in series with a 100R battery connected to the microcontroller's VBAT pin.What could be the cause?Is there any way to understand why it's drawing so much current?NB: The datasheet states that the RTC draws 225 nA at 1.2 V, including the LSE's power consumption. Thanks

I'm currently using single 16-bit ADC, my requirement is to have ADC conversion error less than 1mV.I'm using the ADC with DMA. I'm a beginner, currently getting 1-2mV error and it is not constant too.  #define SCALE (3300.0f/65535.0f) uint16_t adc_val = 0; uint16_t ADC_ARR[5]; void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc){ adc_val = ADC_ARR[0]*SCALE; } HAL_ADCEx_Calibration_Start(&hadc1, ADC_CALIB_OFFSET_LINEARITY, ADC_SINGLE_ENDED); HAL_ADC_Start_DMA(&hadc1, (uint32_t*)ADC_ARR,1); Also the ADC clock is derived from HSI  

Hi~ NUCLEO H563ZI USART GPDMA channel6 not received buffer.   static void MX_USART6_UART_Init(void) /* GPDMA2_REQUEST_USART6_RX Init */ NodeConfig.DestAllocatedPort = LL_DMA_DEST_ALLOCATED_PORT1; NodeConfig.DestHWordExchange = LL_DMA_DEST_HALFWORD_PRESERVE; NodeConfig.DestByteExchange = LL_DMA_DEST_BYTE_PRESERVE; NodeConfig.DestBurstLength = 1; NodeConfig.DestIncMode = LL_DMA_DEST_INCREMENT; NodeConfig.DestDataWidth = LL_DMA_DEST_DATAWIDTH_BYTE; NodeConfig.SrcAllocatedPort = LL_DMA_SRC_ALLOCATED_PORT0; NodeConfig.SrcByteExchange = LL_DMA_SRC_BYTE_PRESERVE; NodeConfig.DataAlignment = LL_DMA_DATA_ALIGN_ZEROPADD; NodeConfig.SrcBurstLength = 1; NodeConfig.SrcIncMode = LL_DMA_SRC_FIXED; NodeConfig.SrcDataWidth = LL_DMA_SRC_DATAWIDTH_BYTE; NodeConfig.TransferEventMode = LL_DMA_TCEM_LAST_LLITEM_TRANSFER; NodeConfig.Mode = LL_DMA_NORMAL; NodeConfig.TriggerPolarity = LL_DMA_TRIG_POLARITY_MASKED; Node

Greetings,I have used CRC peripheral in STM32G0B1 and its working fine. I am using this peripheral to calculate 16-bit crc. How to accomplish same task in STM32F207ZG ? I am using HAL and after code generation crc init code is very incomplete as per me. I have compared CRC init code for STM32G0B1 and STM32F207. Please guide on using CRC peripheral and code generation for STM32F207 using HAL.

 Hi everyone,I am working on an STM32H523 MCU and I have recently observed some strange behavior regarding the PB14 and PC9 pins. I have the following setup:PB14 is configured as input (I use this for the TIM2_CH2 alternate function, but this does not affect the issue) and is externally pulled up using a 10kOhm resistor.The PC9 pin is configured as output.When the PC9 pin is unset, the PB14 is 3.3V, as expected. But when setting the PC9 pin, the voltage on PB14 drops to only 1.13V.  These pins are otherwise not connected, so 2 seemingly unrelated pins seem to have some dependency within the stm32h523 chip.  Another test was performed by configuring PB14 as output (without pullup). Now, when PC9 is unset and PB14 is set, the voltage on PB14 is 3.30V. When setting PC9, the PB14 voltage drops to 3.26V, which seems related... To make sure it is not caused by our own har

I am using LTDC for interfacing with a TFT LCD. The LCD is connected with 18 bit (RGB666) interface. I have selected the pixel format as RGB565, and I am using a frame buffer stored in the internal SRAM. The frame buffer has been populated with 16 bit RGB values. The problem is, I can only see the output when I enable the CLUT and populate the CLUT with RGB values. Otherwise, if CLUT is not enabled, I cannot see the output. As far as I know, CLUT is used in L8 pixel format, but for RGB565 CLUT is not used. I am confused about this situation. Any idea what may be happening here?

Hi folks, I'm using one timer to generate a pulse train (TIM4), and a second slave timer to count the pulses (TIM8).  This is on an STM32U575.I have this working nicely using a timer with centre aligned mode 3 for the counter mode, with the channel using asymmetric PWM mode 2.  I set CCR1 and CCR2 to high values near the ARR value and this generates a small pulse of whatever duration is needed.  The slave timer prescaler divides the update events by two, so I count up on every two update events, and this occurs when the underflow update event occurs.  This results in the update events being 180 degrees out of phase with the pulses, which is exactly what I need.However, I would like to dynamically adjust the frequency through DMA updates of ARR.  Ideally, I would avoid any CCR1 or CCR2 updates and just update ARR only.  To do this, I'd like to use asymmetric PWM mode 1 and use fixed low values for CCR1 and CCR2.  This would allow ARR u

Based on the information found in AN4286 rev 14, I am trying to command to bootloader to start executing the application.The setup is a H573 and a H563 connected over SPI @ 0.5 MHz. The 573 operates as SPI master, and the 563 as a slave. I know that the HW is fine as I have no problem with the communication (application to application) when booth are configured with BOOT0 = 0.Then I set BOOT0 = 1 on the 563, and tries the following code:void BootloaderTest(void) { clrEsbCsN; DelayUsBlocking(10); // Sync frame uart_printf("SEND SYNC 0x5A, RX: %.2X\r\n", SpiWriteEsb(0x5A)); DelayUsBlocking(10); // Get ACK. if (GetAck()) { // Send GO command. uart_printf("SEND SOF 0x5A, RX: %.2X\r\n", SpiWriteEsb(0x5A)); DelayUsBlocking(10); uart_printf("SEND CMD GO 0x21, RX: %.2X\r\n", SpiWriteEsb(0x21)); DelayUsBlocking(10); uart_printf("SEND CHKSUM, RX: %.2X\r\n", SpiWriteEsb(~0x21)); // single byte command, nothing t

I am implementing a firmware-update mechanism on STM32H755 (Nucleo board, MCU rev U) in which the two flash banks are independent.  New firmware is flashed by erasing the "other" bank (which is always mapped at 0x0810 0000 and accessed with the ____2 register set, e.g. FLASH_CR2), then writing the candidate firmware image into that bank, verifying a SHA hash after programming, and finally toggling the SWAP_BANK bit in option bytes, performing an option-byte update, and software reset to boot into the new image.  This works, and I can perform one update after another, ping-ponging back and forth between the banks.  Note that the running application is always mapped at 0x0800 0000, is [much] less than 1 MByte, and never touches the other bank at 0x0810 0000 except to erase and program it when an update is requested.The issue I am having is that when the code runs in Bank 2 and an update commences, the bank erase of Bank 1 is stalling the CPU for several seconds.&

I have a problem and currently no clue how to further debug. Maybe one coudl help me. I use STM32f4 to capture with ADC1 3 signals with 1Mhz (so 333kHz per channel) triggered by a timer and transfered via DMA. I have a DMA buffer of 3*2*100 (so 100 samples per channel per half DMA). When DMA is Half/Full filed, I store the data in a second buffer with 10 times 100 samples. Using a test sin signal ~23kHz, I get discontinuities at each 100 sample border. I check the code several times but could not find an error and it seams like ADC sampling is kind of pausing at each DMA Half/Full callback call (which seams not plausible)BR, BastelBaus The faulty output with discontinuities each 100 samples:

Hiya. This is my first time working with custom STM PCBs.I was planning on flashing/programming my custom STM32H7 board (specifically STM32H7A3RGT6) over STLINK and then just do general purpose programming over the USB-C COM Port. However, the TAG connector pitch was the wrong size so I'll need to find an adaptor to connect that to the STLINK module I have.I was wondering if there is anything I can do in the meantime to program the board? The SWO/SWDIO/SWDCLK pins are broken out and I have a Nucleo L432KC. Are there any guides or tutorials for me to follow for this kind of thing?Any help is much appreciated :).

Hello,I'm working with STM32F429ZI nucleo board, and I would like to flash my program using UART (USART1 or UART3 via  a usb to ttl converter)  instead of ST-Link.I understand that STM32 has a built-in bootloader that can be used for flashing via UART, but I'm not sure about the exact steps or tools required.when I connect the uart  with  STM32CubeProgrammer an error message come :-13:58:51:175 : Error occured while sending Init command.13:58:51:175 : Error: Activating device: KO. Please, verify the boot mode configuration and check the serial port configuration. Reset your device then try again......settings I did:1.the boot0 pin connected with 3v3 and boot1(pb2) connected to ground2.uart3 pins PB10,and pb11 used for tx and rx respectivelyHere’s what I’ve tried / what I need help with:1. How to connect the UART pins correctly for flashing?2. What BOOT0 and BOOT1 pin settings are needed?3.

Hello, We have a STM32H755 with an FRam (similar to SRAM) module attached to the FMC. We have been seeing CPU exceptions when the M4 core tries to access (read only) the same memory location the M7 core is writing to. So, it seems that the FMC does not arbitrate between the two cores... Is that correct? or do we potentially have the FMC configured incorrectly.   We have the FRam memory address region configured in the MPU as shareable (M7 - read/write) and read-only (M4 - reads only) and tried with cache disabled as well with same cpu exception... Thanks, -mike

Hello,I am working on an STM32C011 (Nucleo-like custom board) and trying to use I2C1 with the following pinout:PB7 → I2C1_SCL (AF14)PC14 → I2C1_SDA (AF14)According to the reference manual / datasheet, PC14 can be mapped as I2C1_SDA (AF14).I connected an SHTC3 humidity/temperature sensor (address 0x70) to these lines with 4.7k pull-ups.Problem:My I²C scanner code never detects the SHTC3 (always NACK at 0x70).If I configure I²C on PB6/PB7 instead, the scanner works.GPIO PC14 seems not to toggle as SDA when I try transactions.I suspect this might be related to PC14 also being used for LSE (OSC32_IN). In CubeMX, I set LSE = Disabled under RCC.But I still wonder if PC14 can reliably be used for I²C, or if there are silicon limitations

Hi everyone, first, our setup: We're currently developing a custom-made board using STM32U375CGU6Q. We've configured the ADC1 for continuous scan conversion of 9 channels - VSENSE (int. temp. sensor) being one of them - and use the GPDMA to transfer the data into a buffer array. Using FreeRTOS, we have a task that regularly checks the temperature. VDD is supplied by a 3.3 V regulator, VDDA/VREF+ via a 2.048 V reference with up to 20 mA output current, VDD11 is using the SMPS (circuitry for SMPS is basically a copy-paste from the NUCLEO-U385RG-Q). Since there is currently a bug in CubeIDE regarding U3 PWR, we start up with the internal LDO enabled, then switch to SMPS using HAL_PWREx_ConfigSupply(PWR_SMPS_SUPPLY)straight after

Hello,Is there any chance ST could provide examples or guidance on interfacing a CSI (MIPI) camera with Raspberry Pi Camera Module 2 NoIR cameras?From my initial research, it seems the CSI connector uses the same pin layout as Raspberry Pi cameras. However, available examples are quite limited, making it challenging to implement this on my own — especially compared to the simplicity of working with DCMI.Any documentation, sample code, or community insights would be greatly appreciated!Thank you.

Reading STM32U5A5 Rev. ID returns 0x3003 using STM32Cube HAL API that is not listed in Reference Manual (RM0456). What is the revision of this product? The Reference manual lists only 0x3001 as revision X and 0x3002 as revision W.Thanks.

Hello, I'm using WinUSB and I'd like to program the flash memory at address 0x0800c0000 in 256-byte increments. This works fine the frame but every frame after this gets written to blocks in increments of 1024. It seems that if one needs to push more than 1024 bytes then I must use 1024byte pages. Does this sound correct? I'm testing this on a Nulceo H7A3ZI-Q

I've spent some time recently trying to prototype a small project based on the STM32H503 which would need to have the ADC and DAC running simultaneously with multiple channels of analog I/O via DMA. I was able to get this all coded up but discovered that sometimes on reset the DAC outputs were not as expected. Cycling power or asserting NRST would sometimes fail and sometimes operate properly. A quick look through the H503 errata revealed that this is a known issue - "2.2.21 Invalid DAC output voltage for several DAC kernel clocks".The problem is that the DAC requires both a bus clock and a kernel clock, and likely because of a synchronization issue between them the kernel clock and bus clock must be the same. Ordinarily this wouldn't be a huge problem except that the DAC and ADC share their kernel clock and the ADC is limited to a maximum 125MHz for its kernel clock. This results in the derived requirement that the AHB bus clock cannot exceed 125MHz when both the DAC and ADC

Hi,I'm using an STM32H7 microcontroller and need to get the RTC working.I set RTC_OUT to 1Hz and set the LSE to a 32.768Hz crystal, and inserted the CR2032 battery.When the microcontroller is powered (VDD 3V3), I see the waveform oscillating at a frequency of 1Hz.My question is: should the signal on the RTC_OUT pin remain when I remove the power?Thanks

Hello everybody,I'm trying to get from a pulled up state / driven up state to a tristate pin without losing the charge that is on that pin.It seems to me, that whenever a pullup is deactivated (PUPDR), that STM32 will first discharge the pin and then enter the tristate.The same happens when changing the mode (MODER) from (high-)driven output to tristate input. Also the pin gets discharged first and then floats from 0V to some 120mV or so within some seconds... I've tried STM32F401, STM32F103, STM32L152 ... they all behave the same, unfortunately. Do you know of any way to get from a high pin to a tristate pin without the pin being discharged first? So that the pin floats at 3V ? Thank you and best regards

Hello Team,We are Looking to select MCU Which has High Speed SPI and QSPI in a Single Device ,High Speed SPI - 50 Mbps to 90 Mbps ( One channel ) to interface External Ethernet Controller QSPI  - ( One channel ) -  to interface with External Motion UnitBoth above interface work Independently and simultaeneously. Device from MCU Series U5 and H5 Would be preeferable. However , Our application is not batttery powered , so no power saving Headache.