STM32 MCUs Products

Hi,I would greatly appreciate it if someone could share their thoughts here and let me know if my understanding is correct.Question 1. The STM32H573 supports both USB Host and Device, but why are “USB_OTG_FS” or “USB_DRD_FS” not visible in CubeMX?It appears to be due to the USB IP architecture. The STM32H573 integrates a dedicated USB 2.0 Full-Speed Host & Device block, but unlike some other STM32 series, it does not provide an OTG/DRD block with ID-pin based automatic role switching.As a result, CubeMX only exposes it as “USB (FS)”, and the user has to manually select either Host or Device mode.Question 2. Is the current CubeMX GUI template for the STM32H5 series limited to Device-only USB configuration?Both Host and Device functionality are supported by the hardware, but in CubeMX the GUI is still modeled primarily for Device-only use.This means that CubeMX does not automatically generate the corresponding code for Host operati

I have three questions regarding the STM32U083RC： 1.Why  is the reset value of EXTI_IMR1 register 0xFFF80000？The EXTI line 19-21 is configurable lines。 2.I encountered a problem: when I used the NUCLEO-U083RC demo program to PWR_STOP2_RTC, I found that when the bit28 of the EXTI_IMR1 register was configured to 0 or 1, the RTC could wake up the MCU from stop mode. Why is the function of EXTI_IMR1 register not working? 3.Why does RTC/TAMP describe combined with EXTI lines 19 & 21 in the Vector table?

Dear All, I am having difficulty with the Bootloader on an STM32469.It is on a custom PCB (which works fine in all other respects), and I can use the SWD interface via J-Link perfectly OK (with both STM32CubeIDE and STM32CubeProgrammer).My starting point is a board where the Readout Protection was set to Level 1. Note that this is true for all hardware I have access to, so I cannot try with a board that has never had Readout Protection applied.I can reset the Readout Protection to Level 0 (0xAA) via J-Link. This erases Flash (expected behaviour).I can check the FLASH peripheral registers via STM32CubeProg, and they all look OK.

So I am reading the RM0008 Reference manual because I need to describe some limits for my systemI am looking for the UARTs tolerance of clock drifton page 800 I am confused by these tables: In my case DIV_FRACTION is different from 0 and the M bit is 0The way I read the table... the Noise Flag triggers as an error if there is more than 3.33% clock drift...but... it does not care if there is 3.88%...This makes no sense so... am I misunderstanding something  or?Link to the document in question:

Can I ask how to use my PB8 pin as CAN, since it is Boot 0? I pull Boot 0 to Ground to avoid it floating, then how to use it as CAN pin

So, I'm trying to increase my ENOB from 13.7 bits to 16 bits or higher through the hardware Oversampling system, if possible:MCU: STM32H750V1) If I increase the Oversampler ratio to 128 or 256 without any bit shift, do I get the increased ENOB?2) My application does not need the absolute accuracy, only precision(or resolution), and low noise. How can I increase the ADC bits to 17 or 18 bits, and receive 18-bit data in my memory buffer?I use 16-bit DMA transfers into a 16-bit Memory buffer, and everything works. Then, as soon as I change the DMA and buffer size to 32 bits to receive higher bits, I get very large and wrong values, what would be the culprit? I'm out of the Application Notes and Reference Manual to read, and I couldn't see a clear explanation of how to do bit shifting or achieve higher than 16-bit resolutions..And the Fact that I'm a bit of a noob doesn't have to do anything with it of course.Any help would be

Hello,I have custom board with STM32N6. I followed guidelines how to enable the ITM console:https://community.st.com/t5/stm32-mcus/using-the-itm-console-for-printf-redirects-and-lwip-debug/ta-p/723472The System Core Clock is set to 600MHz, confirmed with variable SystemCoreClock=600. The Trace Anynchronus Sw is selected and PB3 connected.Simple ITM_SendChar(101); gets executed but no output in the console. I tried 600MHz core clock for the Serial Wire Viewer, also many other clock frequencies like 75MHz (TPIU clock), but none is working.Are there any special steps to configure ITM console on STM32N6?

Post edited by ST moderator to be inline with the community rules especially with the code sharing. In next time please use </> button to paste your code. Please read this post: How to insert source code I have a custom board using an STM32H735VGT6 MCU, and I’m trying to configure it to run at different system frequencies, starting from the lowest (170 MHz) and eventually up to the maximum (520 MHz or 550 MHz). I’m using an external 8 MHz crystal as the clock source. My plan is to start at 170 MHz using VOS3 mode (since it supports up to 170 MHz) and later switch to higher VOS levels (VOS2, VOS1, VOS0) for higher frequencies. To check whether the MCU is running at the desired frequency, I set up a timer and assig

Hi all -    I am building an isolated power converter using a three phase forward converter topology.  Each phase has a half bridge driving a transformer primary w.r.t. Vin/2 (split Vin).  The transformer has a mid-tap secondary, rectified effectively acting like a buck regulator at 2x the primary frequency.  I am using the HRTIM hardware to drive this.So far it works great - I have my three phases A/B/C programmed like so (each has high-side 1, low-side 2):A resets on master update, A1 set on A update, reset on A cmp1, A2 set on A cmp2, reset on A cmp3.B resets on master cmp1, B1 set on master cmp1, reset on B cmp1, B2 set on B cmp2, reset on B cmp3.C resets on master cmp2, C1 set on master cmp2, reset on C cmp1, C2 set on C cmp2, reset on C cmp3.The master cmp1 and cmp2 are set at phase angles 60, 120.  The maset compares and all three cmp2 are fixed, while the cmp1 and cmp3 are all set by the feedback code.&nbs

I am incorporating STM32C011J6M6 (SO8 package) in a new project. This is my first use of C0 series (previously only F1 series, and previously only LQFP48 package.)The STM32C011J6M6 makes available both Port B bit 7 (B7) and Port C bit 14 (C14) on pin 1 of the SO8 package. This is the pin I'm initially working with as it would provide a specific interface capability in my project.My question/problem is this - can I configure both port/bit peripherals (B7 and C14) as enabled on pin 1, provided that the two assignments are electrically compatible (they would both be used open drain, and both be idling in the "GPIO set" (or active high) state?There is a reason for this request - port C14 would be used as a USART_TX peripheral in single-wire, async half-duplex, open drain mode, and port B7 would be used as a GPIO input or output in open drain mode. This way I could use the pin as half duplex async, but also be able monitor the pin continuously to see if it has been e

HiPlease provide a sample code to interface a Sigma-Delta type ADC like the ADuM7701 with the STM32H562RIT6, which does not have a DFSDM unit, and guide me on optimizing the code so that the microcontroller is not solely occupied with processing the MDAT signal from the ADuM7701. thank you

ContextCustom 3D-printer controller that I'm developing from scratch, currently on rev7. Rev6 (very similar) runs the same blinky fine. On rev7 I can connect/erase/flash/verify over SWD, but code doesn’t run—GPIOs stay at ~0 V.MCU / ToolingMCU: STM32F446ZET6 (no bootloader)Programmer: ST-Link V2, STM32CubeProgrammer (SWD)Build: STM32Duino / Generic F446ZETx (144-pin), USB support = None, Clock = HAL, Debug = Serial WireTest firmware: blinker for the LEDs on PA8 and PA15 SymptomsFlash + verify at 0x08000000 succeed.Vector table @0x08000000 looks sane (SP=0x200xxxxx,

Hi,I am currently developing a small application with a STM32U5 where I write a few bytes into flash using HAL_FLASH_Program(). All seems to work fine. Except I can only read the data back after I do a reset. I suspect that DCACHE is playing a trick on me? But I am not sure how to invalidate the DCache (preferably only for a small section)SCB_InvalidateDCache();Seems to have some problems on the STM32U5? At least, I was unable to include the prober h-file w/o getting tons of errors. What is the new strategy for cache invalidation? Thanks,Juergen 

HelloI am trying to get the STMN32G431 processor to do what I want.If I set the baudrates 500kB / 2MB and a samplepoint of 87.5% for both and send a CAN packet with FDF and BRS I get after 3 ms:LastError = Recessive Bit Error and 8 Tx errorsand 2 ms later:LastError = Recessive Bit Error,  248 Tx errors and Bus OFF !Sometimes it is also a Dominant Bit Error.This happens even in Internal loopback mode!Therefore I set a Tx delay compensation of zero.But also with other values for Tx delay compensation, it never works.If I chose the samplepoint up to 85% all is still fine.But with 87.5% I get a BusOff which is 100% reproducable.Now comes the strange thing:HAL_FDCAN_ConfigTxDelayCompensation(&can_handle, 0, 0); HAL_FDCAN_EnableTxDelayCompensation(&can_handle);will produce this problem, but w

Post edited by ST moderator to be inline with the community rules especially with the code sharing. In next time please use </> button to paste your code. Please read this post: How to insert source code The LCD Driver in stm32u083rc is consuming more power in stop 2 mode, it is taking more current at every interval (interval is of refresh rate , if refresh rate is 128Hz then the spikes come at  (1/128 = 7.8ms)) currently we are entering low power mode like this  void lowpwrmode_EnterLowPowerMode (void) { // LOG_INFO_UART("Entering Stopmode2 \r \n"); HAL_CRC_MspDeInit(&hcrc); //CRC HAL_SPI_MspDeInit(&hspi1); //SPI HAL_CRYP_MspDeInit(&hcryp); //AES HAL_UART_MspDeInit(&hlpuart2); //LPUART HAL_LPTIM_MspDeInit(&

They are defined like this in stm32h563xx.h:/*Buffer Descriptor Mask*/ #define USB_PMA_TXBD_ADDMSK (0xFFFF0000UL) #define USB_PMA_TXBD_COUNTMSK (0x0000FFFFUL) #define USB_PMA_RXBD_ADDMSK (0xFFFF0000UL) #define USB_PMA_RXBD_COUNTMSK (0x03FFFFFFUL)ADDMSKs are correct, but I was expecting both COUNTMSK to be 0xFC00FFFFUL since both COUNT_TX and COUNT_RX are 10 bits [25:16]. When double buffering is used there is BLSIZE and NUM_BLOCK but I dont see anything about these in the header. Is there a reason the TXBD and RXBD_COUNTMSK are defined like this ?

I have NUCLEO - N657X0-Q board and it has an external flash.. Whenever i upload a code it gets uploaded and runs but when i restart it, it runs on the default code it came in. Can anyone guide me how can i upload the code to external flash. I have tried reading the manual but it didn't help much. Thanks

I am using a nucleo-F103RB. This device was functional in the past. I am getting an error  Error in final launch sequence: Failed to execute MI command:target remote localhost:61239 Error message from debugger back end:localhost:61239: Connection timed out.Failed to execute MI command:target remote localhost:61239 Error message from debugger back end:localhost:61239: Connection timed out.localhost:61239: Connection timed out. I have tried different cables to ensure it isn't the issue. I have also changed the port number. This is my debugger information: 

Hello, we are using a STM32H5 with TZ disabled. In firmware, we are doing the following:- set the product state to provisioning (0x17)- provision the debug authenticationThis already works fine. Afterwards, we can do a discovery an see the validity of the DA ( we read 0xeaeaeaea). Regression afterwards works fine.However, we would like to check this validity from within the firmware.1) where does this 0xeaeaeaea comes from? Can we also access it?2) reading back the storage area of the DA (0x0ffd0100) is not reliable. Sometimes, we can read the data we just wrote, sometime we just read 0xff... This depends on the code we execute after writing. It is not a timing issue, should we maybe set a certain flag or something like that? The code we used is based on the github project 

Hi, I want to design a board using a STM32H7Rx device that has only one Octo-SPI. I need this Octo-SPI to connect to an on board FPGA, so I can not use it for booting. Therefore I have some questions:Can I boot from standard SPI? I do not need to run from external memory. All program code can be copied to internal memory. Do we need to change the Boot-Rom and can that be done using the STM32CubeIDE software? How can we program the boards (Boot-ROM and SPI) during production? Will booting from SPI be slow? Can we have two code version inside the SPI to support a safe upgrade procedure?    

Posting mostly to record some data on a pretty data-free topic. How long after reset is released does the state of the BOOT0 pin get sampled? On the STM32F413 in particular, but it would be good to know how consistent the spec is. The official docs always just say "pins are latched on the 4th rising edge of SYSCLK after a reset" (or possibly "of startup clock"), but are never clear on when SYSCLK starts. I figured I had a few 10's of µs to play with, but it turns out I was wrong.This scenario is not fast enough: Blue is my BOOT0/NRST signal generation trigger and not important here. Magenta is NRST and cyan is BOOT0.At the trigger ("T") point NRST

PM0223 STM32 Cortex®-M0+ MCUs programming manual (Version 9.0, 20 Jun 2024)

Hi,I have downloaded and installed STM32CubeIDE version 1.18.1, and created a new project for the STM32F042C6T6 chip. For this chip, the latest available firmware pack is STMCube MCU Package for STM32F0 series version 1.11.5.When I install this firmware pack and open it from the STM32Cube / Repository directory, I can see that in the middleware folder I have the STM32 USB middleware library version 2.5.3. This is apparent from the Relese Notes file present in the directory.In GitHub, the latest available version for the STM32 USB middleware library is much newer, version 2.11.4 which contains all the nice things I need such as support for USB composite devices. I have already reviewed the post https://community.st.com/t5/stm32-mcus/how-to-implement-a-usb-device-composite-in-stm32h5/ta-p/708078 found from this forum but thi

Hi everyone,I started designing PCBs last year and have completed a few projects using Arduino and ESP32. For my new project, however, I need to use an STM32 microcontroller. I could technically use an ESP32 as well, but STM32 is more suitable for industrial applications, so I decided to switch.I already have a STM32F401CCU6 Black Pill board, and I can use that chip — but I’d like to ask for advice: Is there a better STM32 option for my project?Here’s a brief description of the project:I’m building a Vehicle Control Unit (VCU) for the Teknofest Efficiency Challenge Race. The race is mostly focused on minimizing power consumption.In the VCU, I need to connect and manage the following components:3 × DS18B20 temperature sensors1 × Hall-effect or proximity sensor1 × LoRa module1 × SD card module

Hi.I'm not very familiar with STM32 yet.Can STM32F103 delay up to 62ns or 125ns to raise GPIO and lower it again during that time interval?Thank you :)