STM32 MCUs Products

Hi.I was in the middle of a debug session in a simple application for the STM32F429I-DISC1 in Keil uVision. I disconnected my board from the computer without ending the debugging session. When I reconnected my board, it wasn't detected anymore and it enters debug mode (I know it because the LED1 blinks) as soon as I connect it. Now I can't flash or debug anything. Anyone can help? 

I am trying to configure TIM3 to reset on incoming PWM pulses and call IRQ on overflow, when pulses not coming. The prescaler and ARR are set for 150% of the PWM period. TIM3 in slave reset mode on trigger from CH2 input. MCU is STM32G051F8P.For some reason IRQ is called all the time, even when pulses coming. And status flags are all over the place, hard to tell what exactly caused the interrupt.Cube-generated initializationstatic void MX_TIM3_Init(void) { /* USER CODE BEGIN TIM3_Init 0 */ /* USER CODE END TIM3_Init 0 */ LL_TIM_InitTypeDef TIM_InitStruct = {0}; LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; /* Peripheral clock enable */ LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM3); LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA

I used the sample code of "en.stm32cubef4-v1-28-0\STM32Cube_FW_F4_V1.28.0\Projects\STM32F401RE-Nucleo\Examples\UART\UART_Printf"I just printed the "test" in the while(1) loop. but the display of my computer is werid, and I checked the clock and hal level code, the clock frequency and data transfer is correct.there are data tranferred on the serial port. I captured from SB63 test point and use the PICOscope

Hi all, I am not able to fully understand how the DATA0/DATA1 toggling works when performing multi-packets transmissions. For "multi-packet" transmission I mean that the "num_packets" in USB_OTG_HCTSIZ_PKTCNT register is greater than 1, (i.e. I want to send 2x512 OUT packets on a bulk endpoint])   [stm32u5xx_ll_usb.c - l.1941]USBx_HC(ch_num)->HCTSIZ = (hc->XferSize & USB_OTG_HCTSIZ_XFRSIZ) | (((uint32_t)num_packets << 19) &

Is there a way to make STM32Cube Programmer controls a pair of pins in a CH340 or similar USB to TTL converter, to be able to control BOOT0 and NRST pins of an StM32 micro? I would like to make  a simple circuit that permits entering and exiting a bootloader automatically, without having to press reset and boot0 switches to program a STM32F030F4 controller.

Currently try to configurate settings for register I2C_CRI. Not sure which value should I set for bit NOSTRETCH. I am using I2C as master. This bit only effected when using I2C as slave. But in manual mention must kept cleared in master mode.  Meaning that if I2C use as master mode need to set 0. Which seems like "clock stretching is enable".... Please advise. should I set 0 or 1 in my case. I cannot understand the explanation. ----------explanation from STM32h7 reference manual----------------------- ・Bit 17 NOSTRETCH: Clock stretching disable ・This bit is used to disable clock stretching in slave mode. It must be kept cleared in master mode. ・0: Clock stretching enabled ・1: Clock stretching disabled Note: This bit can

Hi,This is the first time I am starting a post, sorry in advance if it's not in the correct place.I have a Blue-Pill with original STM32F103C8T6. I have Vbat hooked up to a 0.33 F super cap via 100 ohm. Vdd is connected to V bat with a BAT54C Schottky diode. Vbat is decoupled with a 100 nF MLCC capacitor of good quality.I am using the RTC clock and the backup SRAM. It all works well. However, when powering down it appears that Vbat drops rapidly while drawing somewhere between 2 and 3 mA (depending on the charge level) of the super cap.At first I thought that I had broken the chip by accident and therefore I ordered another Blue pill, but the effect stayed the same: high current consumption.I checked the decoupling capacitor. I checked the diode, even took it out during Vbat operation. I also let the program run in an empty while loop. I disconnected the programmer. Nothing seems to help. The AC level on the 32.768 kHz crystal in V bat and normal m

Hi all, i am trying to use MDMA to transfer data from a cyclic ADC-DMA buffermy ADC buffer is of x size and it is cyclic: adc_buffer[x]and i want to transfer its data via MDMA to a larger buffer while its samplingmeaning that after every ADC iteration the MDMA should transfer the data into the larger buffer N Timessampling_buffer[x*N]like in the picture below:The problem is that only the first part of my buffer is being transferred to the larger buffer and then MDMA remains "busy".Will appreciate any help :) this is my my code (roughly)#define MDMA_BlOCKS_N 4#define ADC1_BUFFER_SIZE 10MDMA_HandleTypeDef hmdma_mdma_channel0_dma1_stream1_tc_0;uint16_t adc1_buffer[ADC1_BUFFER_SIZE];uint16_t adc1_samples[ADC1_BUFFER_SIZE*MDMA_BlOCKS_N]int main(void){//configuring and starting ADC with DMA.....////..//MX_MDMA_Init();

안녕.최근에 STM32H753XI를 사용하여 맞춤형 보드를 만들었습니다.보드의 초기 테스트를 위해 각 주변 장치에 대한 테스트를 실행하고 있습니다. 대부분의 경우 잘 작동하지만 SD 및 eMMC 사용에 문제가 있습니다.내 보드에는 SD 슬롯 1개와 eMMC가 포함되어 있습니다.eMMC는 SDMMC1에 연결되고 SD는 SDMMC2에 연결됩니다.그리고 둘 다 FatFS에 연결하여 파일 시스템으로 사용합니다.둘 다 각각 사용할 때 매우 잘 작동합니다. ... FRESULT fr = FR_OK; #if 0 // FORMAT uint8_t buf[512] = {0, }; // format fr = f_mkfs(USERPath, FM_ANY, 0, buf, sizeof(buf)); #endif #if 1 // MOUNT // mount fr = f_mount(&USERFatFS, (TCHAR const *) USERPath, 0); #endif #if 1 // CREATE AND WRITE FILE char write_name[1024] = {0,}; char write_text[1024] = {0,}; uint32_t write_size = 0; // set data for (int i = 0; i < 1024; ++i) { // set character write_text[i] = 0x30 + (i % 10); } // check file count for (int file = 0; file < 32; ++file) { // set path sprintf(write_na

This is more a bug report, not a question.Background:I want to use OCTALSPI as QuadSPI (QSPI), esp. with VDD set to 1V8. I want to get (at least) 30 MHz SCLK working on QSPI.But I cannot go faster as 12.195 MHz, which is associated with a OCTALSPI clock divider set to: 13.Symptoms:VDD = 3V3:down to clock divider = 13 - all looks fineclock divider lower (for faster speed): looks different on SCLK but might be OK (still reasonable, even with gaps)the minimum for clock divider with VDD = 3V3 is: 6 (resulting in 27.778 MHz - I want to see 30 MHz working)anything faster (smaller clock divider) FAILS: there is no SCLK anymoreVDD = 1V8:all fine down to clock divider = 13 - the same as 3V3clock divider = 12 - FAILS completely! no SCLK anymore!with VDD = 1V8: I cannot even reach the same speed as with 3V3Details on FW:I use the standard HAL functions. My QSPI ends up in calling "HAL_QSPI_Transmi

In Figure 1 of the reference manual RM0433 for the STM32H743 (and STM32H742, STM32H753, STM32H750) no connection between cache and DTCM-RAM exists.  For all I know this is correct since the DTCM-RAM is not cachable.Table 7 on the other hand shows that the DTCM is cachable.

I am attempting to bring up a custom board using a STM32U5A9 chip. I modeled the board off of the STM32u5a9j-dk dev kit (the one with a circular screen). I've been able to get our LCD screen to work over DSI and touchGFX currently runs fine.Now I am trying to run the frame buffer off of a PSRAM chip (the exact same chip on that is on the dev kit board - aps512xxN-OBR. Note that the DK chip says aps512xxN-OBRx while our custom board chip says aps512xxN-OBR. This seems to be inconsequential based on the datasheet however.) I am using BSP drivers found on the stm32u5 github page. The board I am using is currently missing the octospi flash from the devkit but in a future iteration of the board I will be using that.I have been unable to complete initialization of the PSRAM on the custom board due to a timeout in the first registerRead after the PSRAM is reset. However when I run this same code on the dev kit it runs just fine and intitialization works. I've triple

Unable to write in EEPROM AT24C256 This is the code I2C_HandleTypeDef hi2c1;#define EEPROM_I2C &hi2c1// EEPROM ADDRESS (8bits)#define EEPROM_ADDR 0xA0// Define the Page Size and number of pages#define PAGE_SIZE 64     // in Bytes#define PAGE_NUM  512    // number of pages/* USER CODE BEGIN PV *//* USER CODE END PV *//* Private function prototypes -----------------------------------------------*/void SystemClock_Config(void);

Hi  Since almost 10 years I'm working with STM32F103VF microcontroller with KEIL IDE, and I don't have any problem. But yesterday I received the last batch from my PCB manufacturer, and it installs that reference STM32F103VFT6 as always, but I can't debug with KEIL. And I don't understand why.  I erased all sectors, and with ST-link Utility I can program my device successfully, but I can't debug with KEIL.  Is anything to take into account to debug it? If I check the completely name writted in the microcontroller I can see: STM32F103VFT6 99CBK 93 A MYS 99 322Is this batch the problem? Regards, 

Hi, I've a problem with function HAL_UART_Transmit_IT.If I call this function with global data array, there isn't a problem, but If I call it with a non global data array, I receive wrong data.This is a sample code:void SendData() { uint8_t s[10]; memset(&s, 0x10, 10); HAL_UART_Transmit_IT(&huart2, &s[0], sizeof(s)); }This example gives problems, but if I move "uint8_t s[10]" out of function (make global) all works fine.I don't understand the problem :(I'm using IAR.Some idea?Thanks.

Hi Team,I have configured the I2C in Master Mode and Enabled LPDMA channel 2 and 3 respectively for I2C3Tx and I2C3Rx./* I2C3 DMA Init */  /* LPDMA1_REQUEST_I2C3_TX Init */  handle_LPDMA1_Channel2.Instance = LPDMA1_Channel2;  handle_LPDMA1_Channel2.Init.Request = LPDMA1_REQUEST_I2C3_TX;  handle_LPDMA1_Channel2.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;  handle_LPDMA1_Channel2.Init.Direction = DMA_MEMORY_TO_PERIPH;  handle_LPDMA1_Channel2.Init.SrcInc = DMA_SINC_INCREMENTED;  handle_LPDMA1_Channel2.Init.DestInc = DMA_DINC_FIXED;  handle_LPDMA1_Channel2.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_BYTE;  handle_LPDMA1_Channel2.Init.DestDataWidth = DMA_DEST_DATAWIDTH_BYTE;  handle_LPDMA1_Channel2.Init.Priority = DMA_LOW_PRIORITY_HIGH_WEIGHT;  handle_LPDMA1_Channel2.Init.TransferEven

HelloI am running a NUCLEO-H723ZG board.User data is saved to internal flash from within the application according to the following procedure: unlock the flash, erase, program. None of the operations return errors. When monitoring the memory, everything looks correct.The sector used is sector 7. Starting address 0x080E0000.Here comes the issue: the next time deploying the application/powering on the board, lots of areas in the sector are filled with 0. For instance:0x080E0000-0x080E0040 are only 0, even though I have written (non 0) to them.0x080E0040-0x080E0200 are OK0x080E0200-0x080E0240 are 0.0x080E0240-0x080E0400 are OK. And so on. This pattern repeats over the entire sector.The size of the 0-areas seems to vary every time deploying and re-run the application. I have found a workaround that seems to work: Delete 2 sectors, starting sector 6. Sector 6 will now be corrupt as described above, while se

How are these pins "push pull", if they are Inputs?JW

I have a project to use the STM32L496 to sample an analog pulse for processing.The sceraio as followes:Input guassain pulse will be fed to postive comparator input, the negative terminal will be set by the DAC. Once the signal above the DAC threshold, it should start a sampling timer for an adjustable  total sample time (i.e. 10 uSec)  based on pulse width.  The samping time will be around 1 uSec.  I will be driving this uC to maximum speed of 72 Mhz.I would like to know the total system delay from when the signal is above threshold until the ADC start sampling?Comparator propogation delay (??) ns ( i think it is about 80 ns)Comparator to the start the timer (??)Timer to start the ADC (??)I could not easily find the information from data sheet and I do appreciate if you could help.Another question, it is possible to directly trigger the ADC to start sampling a known number of samples, I think NO, but would l

Hello,I have been experiencing a problem with the usage of the internal ADC on my STM32L476RG Nucleo64 development board. Unfortunately I have not been able to find similar problems online or in the forums.I would like to use the highest possible sampling rate (5.33 MSps according to https://wiki.st.com/stm32mcu/wiki/Getting_started_with_ADC). However, this wiki article uses the clock divisor of 64x and sample time of 92.5 cycles.For testing purposes, I am generating a 1Hz 3.3Vpp sine wave with an Agilent 33250A waveform generator and measuring the signal on the wire to the ADC pin with an oscilloscope. As sample rate increases, the signal is distorted immensely.

Hi team,            I am working on USB recently, wanted to try the OTG application. I want to understand the OTG working is there any project or sample code or docs available for the same? if yes, plz share me the reference. Thanks,Shikamru

I want to know if the OV5678 image sensor will support STM32L496AG.? https://www.ovt.com/products/ov5678/    

Hi,can anyone please provide help/sample/tutorial on how to read two different ADC Pins on my STM32L031F6 using STM32CubeIDE, idealy without DMA, but with would also work.I have two analog signals on PA2 and PA3 and would like to read them. I suppose this are CHANNEL_2 and CHANNEL_3. I tried to follow different tutorials but the important settings are not available in my IDE (Scan Conversion Mode, Number of Conversions, ...). I suppose it is a configuration issue, because when performing the classical HAL_ADC_PollForConversion and HAL_ADC_GetValue it either returns always 0 or always the same Value for all channels (seems to be the first one).Any hints?Regards, Durpex

Hello All, I am working on a custom desing board having STM32L053C8T6. It uses IrDA setup for the communication. I have setup the MCU at 131KHz as System clock to achieve Low power consumption (currently 65uA). Now i need to communicate with the PC using IrDA setup. I have tested the irDA setup with 2/4/16/32 MHz with baud rate 115200. its working fine. but when i select the baud rate 2400, 4800 or 9600 it does not work. As MCU running on 131Khz, so i cant achieve 115200 baud rate or i dont know. That would be great if someone can suggest me the solution how i can :achieve 115200 baud rate at 131KHz or use irDA at 2400 baud rate. Thanks :) 

I use OCTOSPI as SPI master and listen via SPI3 as Slave (in SW NCS mode) what was sent from master.SPI3 Slave fails for clock speed 80 MHz (larger as 54 MHz:(Symptoms:the data bytes on SPI3 slave are wrong (they look like shifted by one bit)running my command again results in a hang (polling status seems to fail)with OCTALSPI DIV = 3 (53.333 MHz) - all looks fine stillso, SPI3 can keep up with 54 MHz as a SPI slaveAlso realized:with debug options (-g3, -Og) it fails earlier, already 40 MHz is the fastest I can get. But OK (obvious: with better optimization a faster speed for polling).I use these conditions:QSPI (OCTOSPI in QSPI mode) is the masterSPI3 is a slave, just using SCK and MOSI (NCS is in SW mode)QSPI sends in indirect mode, via "polling" (checking FIFO threshold before to send a new b