STM32 MCUs Products

Hi ST Team,We are using CAN on STM32L562 in classic mode.After configuring, we se FDCAN.PSR.ACT to be 1 as can be seen in screenshot below.This means, node is neither receiver nor transmitter.Why is this happening ? We are able to receive the data, but the CAN controller does not send the ACK when a frame is received which results in retransmission of the frame from the transmitting node.Tried configuration:hfdcan1.Init.AutoRetransmission = ENABLE;hfdcan1.Init.StdFiltersNbr = 1;Yet ACT bits in FDCAN1->PSR becomes '0x1' when the instruction "CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_INIT);" is executed (i.e. while leaving the initialization).It can be seen in the screenshot below.

Hello,    We have developed an image capturing application successfully based on STM32H7xxxx and OV7725 camera. We are now targeting to port the application to target STM32U5xxxx with the same camera. But it looks the DMA doesn't works as expected. The DCMI DMA complete callback is firing with no image data in the target buffer.     Please guide us how to port the application from H7 to U5.Best regards-Shubhendu Bikash BanerjeeAttaching here snaps of the configurations we made so far.DCMI GPIO

The VENC peripheral on the N6 boasts a hardware handshake path with the DCMIPP peripheral, potentially allowing full compression of each frame to occur with very little active RAM. From what I can find, the DCMIPP capture starts, then the VENC is told to start encoding, and the application only then receives notifications when a frame is complete. There should be no further interaction. However, I am unable to get this working for MJPEG. The examples for this sort of streaming are all for h264, and the JPEG is thrown to the side as a one-time encoding. I have reasons on this project to use MJPEG encoding, but I cannot get the VENC to perform this handshake with the supplied example code. I have attempted to modify the JPEG Encoding Example that uses the VENC, and have successfully used the VENC for JPEG encoding of a full in-RAM frame, so I know the peripheral can work. Relatedly, the only articles on the handshake algorithm I can find is for the H264 compression.I'm looking

Good days at all. I need to start a project and I'm unsure which path to take: I'd like to create an application that requires some tasks to run in parallel and some to run at different times. I've used timers as interrupts in the past, so as soon as a timer reaches its end, I can execute tasks. Now I know I can also use tasks using FreeRTOS, and as I've seen in general, it seems that each declared task has settable delays. My question is this: when working with multiple tasks, is it better to use FreeRTOS or the interrupts of the various timers available? Another question: are the delays that can be set in the cycles within the tasks precise? From what I understand, I believe that both the timer and the FreeRTOS task are non-blocking activities for the processor, which can then perform other tasks without being "blocking." Thanks in advance.

Pls cross  TI part number TMP75AIDGKR (Temperature Sensor With I2C and SMBus Interface) Previously there's a Cross Reference tool in ST website but it's gone. I use it regularly. I hope it can be reinstated. 

Hi all,I have been trying to set up an ethernet connection to stream camera output for my own project (using the STM32N6 Discovery Kit with a different IMX image sensor). Before working on this, I uploaded and ran the VENC RTSP Server application, and it was working correctly. I then returned back to my own firmware implementation for a day or two and I could not get the ethernet to work.Then, when reuploading the VENC RTSP Server application, I found that it was no longer working. The issue is essentially the same as what occurs in these posts, the difference being this is not custom hardware:https://community.st.com/t5/stm32-mcus-products/ethernet-sw-reset-timeout/td-p/703469https://community.st.com/t5/stm32-m

We have used STM32H743VIT6 in our project. To calculate product life cycle we required below details,MTBFFITUsage temp (°C)Confidence Level (%)Activation energy (eV)Test temp (°C)Test duration (hours)Sample sizeFails 

 1. Please suggest the pin for programming interface or documents 2. Programme example for tick timer, two external interrupts? library 

Hi, I have stm32l4ri-eval how do i configure the octospi interface to use the issi hyperam which is onboard.

Hello I am having an weird issue and was hoping if someone could provide some guidance. Hardware : Two Stm32 H7 with CAN Transciever Nvidia Orin Can Adapter/Sniffer (Canable) What works :  Stm32H7 to Stm32H7 Nucleo Board Can Bus works. Nvidia Orin < - > Canable Adapter Can bus works. Issue : Can bus communication from stm32 H7 to Canable Adapter are not coming through. neither Tx nor Rx. What have i done to troubleshoot Checked wirings for High to High and Low to Low and Tx and Rx as well. Checked voltages for Rx pins at 3.3v( using level shifters wit h transciever) Checked termination resistance and have tested the connections in isolation with both ends terminated with 120ohms ie (stm32- > stm32, Stm32-> adapter, Stm32 -> Orin) I have tested with different baud baud rate like 250, 444, 450,

Hi guys i have a nucleo h7A3Zi-q dev board . i am trying to receive CAN messges sent from ESP32 borads . esp is sending can  frame by using SN65HVD232D. and i configured the FDCAN to receive the can messages . esp can is set at 500 kbits , and my stm configurations is like this  static void MX_FDCAN1_Init(void) { /* USER CODE BEGIN FDCAN1_Init 0 */ /* USER CODE END FDCAN1_Init 0 */ FDCAN_ClkCalUnitTypeDef sCcuConfig = {0}; /* USER CODE BEGIN FDCAN1_Init 1 */ /* USER CODE END FDCAN1_Init 1 */ hfdcan1.Instance = FDCAN1; hfdcan1.Init.FrameFormat = FDCAN_FRAME_CLASSIC; hfdcan1.Init.Mode = FDCAN_MODE_NORMAL; hfdcan1.Init.AutoRetransmission = DISABLE; hfdcan1.Init.TransmitPause = DISABLE; hfdcan1.Init.ProtocolException = DISABLE; hfdcan1.Init.NominalPrescaler = 8; hfdcan1.Init.NominalSyncJumpWidth = 1; hfdcan1.Init.NominalTimeSeg1 = 13; hfdcan1.Init.NominalTimeSeg2 = 2; hfdcan1.Init.DataPres

Hi everyone,I’m currently trying to bring up an external RAM (HyperRAM over the HyperBus protocol) on the STM32L4R9I-EVAL board. While going through the documentation, I’m finding that information related to OCTOSPI and HyperBus on this family is quite scattered, and it’s been difficult to form a clear picture.From ST forums and discussions, I’ve come across mentions of a silicon/errata limitation on the STM32L4R9 family that affects HyperBus support on OCTOSPI. Some posts even suggest that PSRAM/HyperRAM is not reliably supported despite the presence of the IP, which has left me a bit confused about the actual capabilities and intended use.My goal is to use the external HyperRAM in memory-mapped mode (for example, as a framebuffer). In parallel, the board also has an external NOR flash connected over OCTOSPI (non-HyperBus), for which ST provides example projects. However, in those examples the flash is configured on OCTOSPI2, while the schematics

Hi,I am experiencing a core freeze issue on STM32H7S3L8 MCU, as described below.UPDATE 1: Most probably Data Cache is the main culprit, closing Data Cache in bootloader solves the problem. Application code Enables Data Cache and we have never observed any freeze errors in application code. Relocating the HASH code changes the behaviour but same error observed for both HW and SW Hash functions so Hash is probably irrelevant! (see the comment section.)In the bootloader, I compute a HASH over the application image stored in external XSPI flash (memory-mapped XIP). After this process, "we believe", the core occasionally freezes and becomes inaccessible through the debug probe.In the first scenario bootloader firmware remains unchanged; only the application binary varies. The freeze depends on the application binary. Some application images consistently trigger the issue on every power cycle, while others run without problems.

Hello, we have device with very old TFT display which is dying. New one is unable to obtain. It has similar interface as DCMI: vsync, hsync, pixclk, D0-D8.I have connected these clock/data lines to DCMI port, but interrupts was not triggered.Here are my clock lines (from top: vsync, hsync, pix):I suspect that timing of clock signals is not correct - compared with image I have found:

Hello,I am working on a hobby project with https://www.st.com/en/microcontrollers-microprocessors/stm32f767zi.html.I have my own build and development environment based on arm-gcc-none-eabi and CMake and all HAL Drivers and Libraries from STM.The board starts properly up and I have started to work with GPIOs. Most of my initialization routines are copied from Example Projects. I think, that they are very similar, but I´m not 100% sure yet. While initializing the LEDs, the MCU produces a HardFault (and sometimes a Memory Fault) from within the HAL Code. Currently HardFault occurs very consistently. First I want to take care about the HardFault and if MemFault is still occuring, I want to take care of this as well. The error is thrown exactly at this line:

As the subject says. I am not able to connect and re-program or debug my STM32C011 ICs after I set up SWCLK and SWDATA as ADC on my firmware.NRST pin is connected and it still doen't workI know this is expected behaviour, but I should be able to re-program it by connecting the NRST pin to the debugger, however, this is still not fixing the problem.  

Hello,Trying to do precise GPIO pulses with assembly code - on any STM Nucleo board - shows jitter and fluctuating frequency. I was told by a super user to do it via PWMI would like to add some comment that may be interesting for others :- trying to do precise pulses with PWM on the Nucleo H723 for example, still shows jitter and fluctuating frequency around the desire value. Same using HSE or HSI. Same with Nucleo-F411. Same with Nucleo-N667. I understand the reasons now.But playing around the Nucleo-N657, I got some success : if you feed your CPU_clock directly with HSE (48MHz on board), and feed the other peripherals, including timer_clock with HSE+PLL (400MHz for example), then the resulting PWM is quite accurate and stable !Regards,

Hello,I'm using the STM32H723 (at 550MHz) to generate pulses on a GPIO output at a certain frequency (around 4KHz)I'm generating the pulses with assembly code. I've stopped systick and interrupts. However, looking at the signal with a scope, I'm discovering that the frequency is not fixed, moving around the desire frequency. I've tried both with external cristal or internal HSI. Same result.What is the reason ? Is there a possibility to stabilise the output signal ?Thanks for your help,Laurent 

Hello,I am currently working on interfacing an OV7670 camera with an STM32F429 using DCMI + DMA, and displaying the captured image on an ILI9341 LCD (SPI interface).I have successfully confirmed that the LCD itself works correctly (for example, filling the screen with a solid red color).However, no camera image is displayed, so I suspect there may be an issue with the camera operation or the DCMI configuration.I am using the following repository as a reference:https://github.com/PHANzgz/STM32-H7-camera-interface-and-displaySince this project is originally for STM32H7, I have modified the configuration as much as possible to make it suitable for STM32F429

Hello ST community,I have some troubles with dummy cycles using Quad-SPI interface in DDR mode on STM32H743 and STM32F746.I am trying to read data from IS25LP080D QSPI flash with FAST READ QUAD IO DTR MODE OPERATION (0xED command). It is 1-4-4 mode.I am having trouble with number of dummy cycles. From IS25LP080D datasheet there must be 6 dummy sclk cycles between address and data. But to get 6 dummy cycles I must set cmd.DummyCycles = 3; in my program. Why there are 3 extra dummy cycles on diagram?My read function for HAL is below. In this function I set cmd.DummyCycles = 3.IS25LP_Status_t IS25LP_ReadQuadDDR(QSPI_HandleTypeDef *hqspi, uint8_t *buf, uint32_t addr, uint32_t size) { QSPI_CommandTypeDef cmd = {0}; cmd.InstructionMode = QSPI_INSTRUCTION_1_LINE; cmd.Instruction = IS25LP_FAST_READ_QUAD_IO_DDR; cmd.AddressMode = QSPI_ADDRESS_4

One of the AF options on SPI1 is to use the SWD debug pins PB3-PB5.How can this be used in reality?Pretty obviously you can't do SWD breakpoints when SPI1 is thus mapped!But assuming no SWD debugging is needed, and you use SWD just to program the FLASH, how does one implement this? AFAICT one would need - on SWD inputs, FLASH loading will work- on SWD outputs (e.g. SWO - the SWV ITM debug output), FLASH loading works because these pins power up in some mode suitable for SWD FLASH programming.Then when the code starts running, you will need some logic to disconnect the debugger, so the clock and data SPI signals can come out, without contention with the debugger.Maybe I am missing something obvious. Or maybe this SPI1 AF mapping option is intended for FLASH programming not via SWD but via a UART, CAN or the weird USB mode.

Greetings!I have the following system:STM32U073CCVBAT pin is connected to a super-cap, and it's voltage was measured to be above the required minimum.During system reset (NRST) it behaves according to my expectations, the RCC_BDCR remains unchanged, but if it is disconnected from Vcc, then upon connecting it back, the LSESYSEN bit is set to 0. This seems reasonable, and is generally not a issue to me, but the reference manual claims that this shouldn't happen? (Everything else works perfectly.)Am I missing something obvious here?Couldn't find any other mention of the bits behav

Hi, I am using the STM32H755ZIT6 dual-core microcontroller.The internal Flash memory has a sector size of 128 KB and a page size of 4 KB. In my application, I perform erase and write operations on a specific Flash sector. If a power failure occurs while the erase or write operation is in progress, I occasionally observe that: The Flash sector being accessed becomes corrupted The sector cannot be read by the application The same sector also becomes inaccessible in STM32CubeProgrammer  This issue does not occur every time and seems to happen randomly during power loss. After full chip erasing it I can access the sector region. I would like to understand: The possible reason for this Flash corrupti

Hi everyone!Could someone help me to understand a problem with STM32G070.We have deployed approx. 50-60 devices with stm32g070 MCU that saves some parameters in FLASH every 24 hours. I know that according to datasheet FLASH memory endurance for this MCU is 1000 cycles. So, in theory, this MCU can work normally 2.7 years. It is also worth to mention that this period is defined for temperature range of -40 to +85°C. Recently, we had a relative cold weather with a temperature ranging from 0 to -10°C. This is far from -40°C that we see in datasheet. However, we had 5-6 devices that have corrupted parameters area (last page from 128K FLASH memory).I was able to reproduce this situation in the office. So I wanted to ask you guys if you had such a strange behavior with this MCU or another one. I need to mention also that this board is coated with special waterproof-coating.Erase and program functions looks like that:

Hi, I'm currently working on a project with an H755 board.The project uses UART communication. I'm developing it on a Windows 11 computer, and it generally works fine on that computer. So far, there are no issues.However, after completing the project, I'd like to be able to use it on my older laptop (currently running Windows 10 with ESU). Here's the problem: my Windows 10 computer doesn't recognize the STLink virtual COM port. It only sees the device as a standard COM port with a Microsoft driver (not ST Microelectronics), and its UART communication then doesn't work.I don't have CubeIDE installed on