Question
B-L072Z-LRWAN1 SX1276 DIO pins mapping - Need verification
Problem Description
I'm working with the B-L072Z-LRWAN1 development board and trying to configure the SX1276 LoRa transceiver DIO pins manually (without using ST's HAL middleware). I want to use an external LoRaWAN library (LDL) that requires explicit DIO pin configuration.
Current Configuration
Based on my research, I have the following pin mapping:
c
#define DIO0_PIN GPIO_PIN_4 // PA4 #define DIO1_PIN GPIO_PIN_1 // PB1 #define DIO2_PIN GPIO_PIN_0 // PB0 #define DIO3_PIN GPIO_PIN_2 // PC2 #define DIO4_PIN GPIO_PIN_3 // PC3 #define DIO5_PIN GPIO_PIN_5 // PC5
Questions
- Are these DIO pin mappings correct for the B-L072Z-LRWAN1 board?
- Which DIO pins are actually connected/used on this board? (I understand some may not be connected)
- Where can I find the official schematic or documentation that shows the exact DIO pin connections?
