STM32 MCUs

The development board I am using is stm32h723. Assuming I only configured region 0 and wrote a blacklist, all regions (both privileged and non-privileged) are inaccessible. The remaining 15 regions were not configured. However, in the MPU Control Mode, I configured "Background Region Privileged access only + MPU Disable during hard fault, NMI and FAULTMASK handlers". This means that for unconfigured regions, only the privileged can access them, and the MPU is disabled during hard faults, NMI, and FAULTMASK handlers. What would happen after this configuration? The CPU is in bare-metal mode without an operating system, and it is in privileged mode. Who should it listen to?

STM32CubeIDE 1.14.1I have imported a CubeMX generated makefile project.  When I enter the debug configuration dialog, I get an error "Unsupported build configuration. MCU ARM GCC required for debug." I have not found any documentation from ST indicating how to install this.  I am also curious why a dependency required to debug an ST MCU does not come with ST's Eclipse debugger. The Eclipse Marketplace returns an error 500 when I search for MCU ARM GCC.The Install New Software dialog just spins forever, not even loading any package data. What I'm looking to do:Debug an MCU application on my target board.I do not actually care about STM32CubeIDE, I am fine using stock Eclipse.  But I do need documentation on how to set up the actual ST specific debug tooling, and this information either doesn't exist or is difficult to find.  If ST's IDE works, that's fine too, I don't really care.

  I don't use this Tx Buffers Nbr. Instead, I use this Tx Fifo Queue Elmts Nbr for sending. The difference between the two is just that one is manually sent and the other is sent by hardware, right? Why does the software give me a pink prompt for Tx Buffers Nbr, stating that the number of Tx Buffers Nbr plus the number of Tx Fifo Queue Elmts Nbr must be 32? What does this mean? Help me, I'm about to cry.I don't use this Tx Buffers Nbr. Instead, I use this Tx Fifo Queue Elmts Nbr for sending. The difference between the two is just that one is manually sent and the other is sent by hardware. Why does the software give me a pink prompt for Tx Buffers Nbr? The number of Tx Buffers Nbr plus the number of Tx Fifo Queue Elmts Nbr must be 32. What does this mean? Help me, I'm about to cry. God!

I upgraded to 6.17 this morning an have already had to roll back due to a bug in how it now generates fiels for FreeRTOS.Under the FreeRTOS (Include parameters) options I have this vTaskDelayUntil set to Enabled.  This now changes the define name in the user config file (Core/Inc/FreeRTOSConfig.h) to be #define INCLUDE_xTaskDelayUntil 1which is correct for the updated freeRTOS version, but in the file (Middleware/Thrid Party/FreeRTOS/Source/CMSIS_RTOS_V2/freertos_os2.h) it has not been updated so it now it throws an error stopping my projects from building. There are other places where vTaskDelayUntil has also not been updated to xTaskDelayUntil. This needs to be fixed.  

Hello, I got following problem.STM32CubeMX is unable to properly generate .project file for STM32CubeIDE. After clicking "GENERATE CODE", MX is copying library files, generating .h and .c files, but no .project file. Following nullpointer exception can be found in log file. I already tested different versions of JAVA - no change. I attached error messages, MX log, and .ioc file. Anyone managed to fix this?  2026-03-15 10:27:00,707 [ERROR] ToolchainGenerator:531 - java.lang.reflect.InvocationTargetException: null at jdk.internal.reflect.DirectMethodHandleAccessor.invoke(DirectMethodHandleAccessor.java:115) ~[?:?] at java.lang.reflect.Method.invoke(Method.java:580) ~[?:?] at com.st.microxplorer.plugins.projectmanager.model.ToolchainGenerator.CallMethod(ToolchainGenerator.java:406) ~[?:?] at com.st.microxplorer.plugins.projectmanager.model.ToolchainGenerator.generate(ToolchainGenerator.java:506) ~[?:?] at com.st.microxplorer.plugins.projectmanager.engine.Pro

Hello,I tried to install STM32CubeProgrammer, but the installer always gets stuck at Step 8. I searched online and found that some people from my country solved the problem by changing the Windows region and language.However, my Windows 11 license only supports a single language, so I cannot change it.Is there any other solution for this issue?Thanks in advance.

Hello to the STM32 Community, I am trying to connect a fast TI DAC904 to a Nucleo board with H743. I am using it as a single M7 core. I have built a project with CubeMX where:Timer1 -> DMA -> FMC -> DAC904Short sine buffer in RAM-D1 and DMA as circular bufferIt works but I am getting maximum speed of 12.6 MSps.I have tried to modify the timer frequency but I am getting a limit at that speed Is there a way to make if faster?Thank you Benny  

Hi ST,I have a STM32H7 project with FW_H7_v1.12.1 and MX v6.16.1, everything is good so far.But after migration to FW_H7_v1.13.0, I can't generate FreeRTOS code any longer.All FreeRTOS-related code are deleted and MX stay loading icon when I click FREERTOS component.I tried uninstall MX and then install latest MX v6.17, but the same.I also tried install X-CUBE-FREERTOS component, but still the same.Please find my ioc file as attachment.Is there anything I can do?Thank you very much.BRs,-Engin

Split from Inconsistent pin naming - this is a separate suggestion.I would like the option to have the define of a particular GPIO port, or all defines, not typecasted to a pointer. So only the base address as an uint32_t (or uintptr_t). This would make using it in C++ in constexpr easier. Because reinterpret_cast and pointer comparison is not allowed in a constant expression. This should be an additional define for backwards compatibility.  #define CLK_A_GPIO_PIN GPIO_PIN_0 #define CLK_A_GPIO_PORT GPIOF #define CLK_A_GPIO_PORT_BASE GPIOF_BASE // <- for use in constexpr In C++ it would be much easier to do things at compile time using templates and constexpr this way. Example:you want to create a function at compile time that sets 2 defined pins highif they are the same port they can be combined in one call to GPIO_set()if they are not the same port they need to be separate callsno macros needed in user code, no runtime checks needed, no manual tweaks n

①Fault Phenomenon: The fourth physical output core acquisition pin is faulty. Without any external connections, the voltage at the CPU pin measures around 4.3V, whereas it should normally be 0V. This also causes the operational amplifier chips connected to it to experience overvoltage. After removing the external connected components and chips, the CPU pin still has floating voltage, and the physical output core reads floating values. Replacing the external operational amplifier chips does not resolve the fault. After replacing the CPU chip, the fault is eliminated.②Fault Location: The U8 pin (pin on page 3) is damaged, causing overvoltage to the external op-amps (IC16, IC15) and itself exhibiting floating voltage, which leads to incorrect data acquisition in the physical output core. Meanwhile, the other four physical output core acquisition functions remain normal; only the PA3 channel is damaged.

Hello all, I want to connect a 3.3 V I2C based keypad with STM32U5G9J-DK1 via a carrier board on which the STM32 board sits via expansion connectors CN9 and CN10 present on it. I am using pins PG13, PG14, and PG9 for my I2C SDA, I2C SCL, and INTERRUPT, which are available as Pin No. 4, 2, and 8 respectively on CN10. The signals pass through a level shifter (TXS0104VDR) on the carrier board for conversion between 1.8 V signals at the STM32 end and 3.3 V signals at the keypad end. These lines are also connected with external pull up resistors as indicated in images attached. All the capacitors between the signal lines and GND have been unmounted. Also, 0 Ohm resistors (R27, R28, and R29 have been unmounted). During operation, STM32 can't detect any I2C device connected whereas the keypad seems to work perfectly when used in a different setup. Upon further investigation, it appears that all the three pins have become unresponsive, even when the board is used standalone, disengaged from th

STM32C5 unlock RDP2 need OEM key, How to use STM32CubeProgrammer to set the OEM key and RDP0 to RDP2? Please provide me with a correct operation procedure. Thank you.  

Could you please tell me how many CAN interfaces are there in STM32H723? I asked the AI, and the AI said there are 2. But when I configured it using Cubemx, I found there are 3. Help me, please!

Hi everyone,I have developed a custom USB DFU HOST class, which I use to update other stm over the usb.I was first on the F4 series, but now switched to the G0 series because of this issuehttps://community.st.com/t5/stm32-mcus-embedded-software/usb-writepacket-stuck-in-infinite-loop/td-p/870532I am using external bypass clock, but the update worked also on HSI just fine.These are all the bootloader versions and the chips I was able to update without any issues:14.4 H573I-DK9.2   L562RET69.0   F446ZE-NUCLEO3.3   F207ZG-NUCLEOBut when I try to update the H745I-DISCO or the H743, the update does not work.I checked the bootloader version on the H745I-DISCO and it's 9.0, which is the same version as F446ZE-NUCLEO which I update without any issues.The update process to update H745I-DISCO worked one in 100 or 200 tries.I have tried messing with timings, clocks, adding prints in the interrupt to slow things down (I know that it's a bad practice), an

I'm trying to use the internal CRC calculation unit in the STM32H7 FLASH controller via the HAL_FLASHEx_ComputeCRC() api. I've finally started getting crc32 values returned but can't match them against any common algorithms ... reviewing AN5507 implies it is using poly 0x4c11db7 and maybe initial value 0 ?I had thought it would match the CRC peripheral defaults but this is not the case.Part of my issue may be address bounds, it seems to be inclusive of the start/end addresses so end address is 1 less (though RM indicates bottom 2 bits can't be set so -1,-2,-3 gives the same results). Finally got consistent return values with different burst lengths but still can't matching other algorithms such as those generated by srec_cat with the -STM32 filter.I've seen some comments indicating this may not work at all but the latest errata has nothing about it (STM32H725)It feels like CRC checking of FLASH memory is exactly what this was supposed to be used for but I'm surprised it isn't better do

Currently I am working on STM32H7S78-DK board, In that I am trying to save some data in External flash which will be read over every boot up but while trying to write in specific memory location it will hit to hard fault. I would like to seek clarification regarding write and erase operations on external NOR flash while operating in XIP (memory-mapped) mode on the STM32H7S78-DK.Current Setup:The application is executed directly from external NOR flash (mapped at 0x70000000 via XSPI).Memory-mapped (XIP) mode is enabled for instruction execution.Read operations from external flash are working as expected.Observed Issue:During erase/write operations, the system encounters hangs and eventually enters a Hard Fault condition.Understanding of the Issue:Erase/program operations require switching the XSPI interface from memory-mapped mode to indirect/command mode.During this transition:External flash is not available for instruction fetch.The CPU continues attempting to execute code from the sa

Dear people,   I use these little square pins and headers (see image), to obtain access to the contacts of CN11 / CN12 of Nucleo Boards, e.g. H723ZG, or F756ZG?. However these are impractical, because movement or vibration might lead to interruptions. And I want to avoid soldering, for specific reasons. Ideally would be some sort of connector that makes good electrical contact and can be coupled/decoupled easily. Can someone suggest an efficient and ergonomic solution?   Thank you  

Dear all,I'm unable to connect via SWD to my STM32F103C8T6. What ever I try I get no target found with STM32CubeProgrammer or ST-LINK Utility (I have tried all combinations at slow and high speeds). - device is virgin- BOOT0 is low- NRST unconnected (shows 3V3) and connected/removed while testing- Connections go through from ST-Link to STM32 pins- 30 Ohm and 0 Ohm tested for SWCLK and SWDIO (GND and 3V3 connection to ST-Link with no resistor)- Correct mapping of ST-LINK pins to STM32 checked multiple times- There are no obvious shorts between any of the paths- 3V3 is stable and GND closed- The ST-Link was tested with a "blue pill" board with the same STM32 on it and it worked flawlessly I have also tried:- Cutting the path to the esternal 16MHz crystal curcuit- Connecting/Disconnecting VCC- Soldered a new STM32 onto the board I am currently running out of ideas, I think there is either a fault in the PCB design that damages the MCU or prevents booting or maybe some confi

Added dual-core to title - may be significant ...Hello.I've tried rename my project in the past, and this always generate a lot of errors due to the dependencies.Which is the properly way?I am working with STM32H755. Yes, dual-core.Thanks!

Hi there,I've been using the STM32H7R7 device (BGA225), but I ran into an issue. I used the TochGFX (4.26) to generate the gfx_task, and after that, I configured the cubemx (6.17), but somehow the linker was not good. Even my code could not be built since the external PSRAM was not set up automatically. I fixed it, but I ran out of ideas. I would highly appreciate it if the demo were to be available to move forward. Thank you very much!Geri

Hello,after setup SPI1 and setting CSTART=1, I expected that SPI is send immidiatly on bus.(I toogled PE00 with CSTART=1)I couldn't find some that explains that behaviour. It behave  the same, if I use DMA or writing directly to TXDR.Do you have an idea ?My testcode. SPI1->IFCR = 0xFFFF; // Clear all flags MODIFY_REG(SPI1->CR2, SPI_CR2_TSIZE, BufferSize); SPI1->CR1 |= (SPI_CR1_SPE); SPI1->CR1 |= SPI_CR1_CSTART; GPIOE->ODR &= ~(1 << 0); for (u32 i = 0; i < BufferSize; i++) { LL_SPI_TransmitData8(SPI1, pBuffer[i]); }CPU is set to 160Mhz and SPI Prescaler is 256 

Hello,I am trying to setup the BLE stack on my custom board without LSE using a STM32WB55CEU6. I have multiple boards on hand, on the first one, appe_Tl_init(); worked fine and I got to the BLE stack initialization code. However BLE never worked due to using a 16Mhz crystal. Before I had the chance to change out the crystal, the MCU bricked due to unrelated flash mistake.Now on the second board, I switched out the crystal to a proper 32Mhz one, unfortunately, despite flashing the wireless stack the same way, the wireless stack seems to instantly hard fault. Everything else, including USB (which relies on tight clock) work on the new 32Mhz crystal, I even soldered back the 16Mhz crystal temporarily, and it did not fix the hard fault. I flashed the most recent FUS and wireless stack, v2.2.0.0 and v1.24.0.3 respectively. I tried with ble_light, ble_full and ble_full_extended, all hard fault CPU2.So, within MX_APPE_Init(), during the call TL_Enable(), CPU2 hard faults. The contents of SRAM

Setup: STM32F411RE + STM32CubeIDE + X-CUBE-AZRTOS-F4 v1.1.0 + TIM4 as HALtimebase Problem: Thread runs once, toggles LED, then hangs inside tx_thread_sleep(50) and never wakes up. Debugger shows:System Timer thread → State: SUSPENDED, Run Count: 0Thread 1 → State: SLEEP, Run Count: 1 System Timer never runs, so sleeping threads never wake up.Question: Why is the System Timer thread never getting scheduled? Any known issues with X-CUBE-AZRTOS-F4 v1.1.0?

Hi,We are running a crypto key generation library on both an STM32G474 (170MHz) and an STM32H563 (240MHz).Over about 80 runs, the average generation time is around 12 seconds for the H5 and 38 seconds for the G4.These times are fine for our application (although faster would be better) but I am curious why the G4 is over 3 times slower as I would have expected something more like 40% longer generation times.The arithmetic part of the library uses some assembler functions for long multiplications and, for both processors, these seem to have picked a section for "Armv6-M (or later) with DSP Instruction Set Extensions."The compiler flags being used are listed here. The repeated sections are because I still haven't really figured out how cmake is generating them but I believe the relevant differences are:-mcpu= cortex-m4 or cortex-m33-mfpu= fpv4-sp-d16 or fpv5-sp-d16compile C with /usr/bin/arm-none-eabi-gcc__VERSION__ "14.2.1 20241119"G4 Flags:C_FLAGS = -mcpu=cortex-m4 -mfloat-abi=hard -mf

  Hello everyone, I’m facing an issue while trying to debug my project custom_for_stm32f103c8t6 in STM32CubeIDE. When I launch the debug session, I get the following error message: Error in final launch sequence:Failed to start GDB server What I’ve tried so far: Installed ST-LINK driver (STSW-LINK009). Changed USB cable and port. Reset the STM32F103C8T6 board. Interestingly, I can still flash the firmware successfully using STM32CubeProgrammer, but debugging through STM32CubeIDE fails with the error above. Unfortunately, the error still persists. Has anyone encountered this problem before and found a solution? Any guidance would be greatly appreciated. Thank you in advance!