STM32 MCUs Products

Hi all,Im using STM32F410 uart 1 to transmit and receive.I use DMA to transmit bytes. I then use TC interrupt to send a break,then push an event to an event queue to signal that the transmitter is free.void interface_uart_tx_eot_isr(if_uart_t* p) { if (p->tx_last_in_chunk) { // Transmit break at end of tx work LockFromISR(); p->uart_dev->usart->CR1 |= USART_CR1_SBK; UnlockFromISR(); // register event for more tx data p->transmit_empty_handlerI(p->event_source); } }On the same uart I use DMA in circular mode to dump incoming bytes.Im using framing error interrupt to wake up a worker to deal with the received data.For the sake of this explanation, I have three stm32f410 devices connected in a ring1Tx -> 2Rx, 2Tx -> 3Rx, 3Tx -> 1Rx.So it is possible for, eg, device 2 to be recieving data as it is sending data.This is working well except:

We are using the STM32H7R7L8H6H microcontroller in our product design.During firmware initialization, we observed inconsistent behavior related to the USB voltage detector on different boards that share the same hardware design and firmware.Specifically, the following code auto generated by STM32Cube ide (stm32h7rsxx_hal_msp.c), this causes the MCU to halt on certain boards:if (HAL_PWREx_EnableUSBVoltageDetector() != HAL_OK) { Error_Handler(); } On some boards, the code runs normally, but on others, it enters Error_Handler() immediately after executing this function.Both boards have identical hardware configuration — USB is not used, and VDD33USB and VDD50USB are tied to 3.3 V.- Advise whether disabling the USB voltage detector is the recommended workaround when USB is not used.

Being fairly new to the STM32 architecture I find the following statement in the STM32F103 reference manual really confusing ... "..., this means that only one request must be enabled at a time." (the same also applies to the DMA2 controller). I think this statement should read as follows.... "..., this means that only one request can be serviced at a time." From my understanding (correct me if I am wrong) each DMA channel has its own interrupt vector (and their own addr\counter registers) , so even if every channel on DMA1 was enabled & signaled a request simultaneously the processor would be able to service each request deterministically based on the built-in channel priority order.  

Hi,I am trying to get USBPD running. I need a simple example code without RTOS. So I used CubeMX. As far as I see it should be easy. All I need to do is:- Turn on the UCPD1 under Connectivity. Here I set "Source". - Turn on the UCPD1 Interrupt- Turn on USART1 - Set the DMA settings of UCPD1 and USART1 (here I have used the settings of the working CubeH5 project)- Turn on USBPD under middlewares- Enable TRACER under utilities- Enable TRACER in USBPD under middlewares- Enable GUI_INTERFACE under utilities This config should work, but it is not working. There is no event handling.

I am using an STM32H757 for a composite USB device with a ULPI HS PHY. I am streaming video data to the device via an OUT endpoint from the host PC (Windows 11). Streaming can be successful for more than 15 minutes but then the host suddenly stops sending packets. Each individual packet is 512 bytes. A typical sequence captured by a USB analyzer is:    OUT txn        OUT packet (3 B)        DATA1 packet (515 B)        ACK packet (1 B)    OUT txn        OUT packet (3 B)        DATA1 packet (515 B)        ACK packet (1 B)If the device is not ready to receive the packet, then the DATA1 packet is NAKed by the device and the host responds with a PING to see when the device is ready. In this case, the sequence looks like this:    OUT txn (NAK)       

Hi, I am tring to write data by the FDCAN bootloader of system memory, my target is STM32H563. Now, I can read the device ID, perform the mass erase command, but I can't write data to SRAM/Flash, the FDCAN bootloader doesn't response any CAN message after the Write_Memory command. Below picture is the CAN message log when I try to write 64 bytes data to flash at 0x0802_0000.

Hello, I have an STM32F777ZIIT which is being used to gather SPI data in receive-only mode on four SPI channels and using DMA to buffer this data. The DMA buffers are 70 half-words long, configured for circular mode, and half the half-full and full interrupts set up. Using hardware timers, the external SPI devices are being triggered to transmit 35 samples every 1ms. This is being done on four SPI channels, with one of them (channel "D") being phase-delayed by 500 microseconds. Note that this is running on bare-metal.The expected behavior is to see all four channels receive the half-full interrupt after 1ms (D last), then the full interrupt after another 1ms.In a consistent fashion, I am seeing this pattern in the half full and full ISRs per channel. All four should have the same DMA configuration.Time (microseconds)Channel A

Hi. I designed a stm32 board an am trying to program it with a stm32 development board. i am having issues with programming it. This is my board design and my programming setup. I have connected the stm32f4 to my laptop to program it and the Integrated Circuit I'm using on my board is the stm32 g431. I know i have not pulled boot0 to low which is a problem i tried to resolve using option bytes where i set the nBoot1 byte to 0. But i have my boards boot up and then after clearing flash storage, they are usually stable. The board isn't dead since current is being drawn but the stm32 status LED is blank and when i try to connect to it with the stm32 programmer, i get ' Unable to detect Core ID. No stm32 target found. If your product uses debug authentication, please enable debug authentication. Please help me figure out what is wrong. This is the second board that has gone this way. I only have 3 more left. 

I am trying to program my custom board with STM32WB15CCU6E on it in Arduino IDE. I always upload the code to my nucleo-wb15 board to verify if it is working before uploading it to the custom board. The main difference between the chip used on nucleo-wb15 and STM32WB15CCU6E is that my custom board has no external 32.768 kHz crystal installed, so it mainly relies on HSE or LSI.However, I could not make my BLE module advertise on my custom board while it is working fine on the nucleo-wb15. I am suspecting except the Arduino code, I probably need to change something in the variant file. Anyone knows how to do it? thanks.

Hi everyone,I am trying to setup DCMIPP Pipe0 to read data from 256x192 pixel sensor by 16 data lines.Seems everything configured and working fine except of transfer data to destination buffer.DCMIPP frame counter is increasing. Pipe0 dump counter is 0x18000 (256x192x2).HAL_DCMIPP_PIPE_Start return HAL_OK.Pipe0 packer memory address register is qual to Pipe0 memory status address register and correspond to address of buffer in RAM.I checked that DCMIPP don't write zero values by initing frame buffer with 0xFF and it wasn't changed to zeros. I am sure that sensor is working because of frame counter, dump counter, checking lines with oscilloscope and it is working with other pcb with STM32H7 and DCMI interface.  Also I validated that debugger read frame buffer correctly by

     Hi,I want to use STM32G431CB or STM32F411CEU6 to measure the time precisely.I need to know the external interrupt response time of GPIO,but I can not find it in datasheet and manual.can you tell me what is the value if the CPU frequency is 100MHz ?

Hi,I am using an STM32U545 on which I expect to use ADC4_IN1 and ADC4_IN18 in stop mode 2 (using LPBAM).I want to create two buffer (buff1 and buff2 uint16_t[32]) dedicated to each input.I want to read 32 samples from input1 then 32 samples from input2 and restart infintely.I don't find the correct way to configure LPBAM.In first try, I use an LPTIM1 as trigger I do :(sorry my project I can't get image of LPBAM configuration)1) ADC conversion (channel 1) => ADC Conversion (channel 20) and loop on first conf bloc and use LPTIM1 trigger for both    => In this case each buffer contain values from correct input but i run only once2) If I do the same but loop on first data bloc => only last channel ise infinitrly sampled on both bufferCan someone help me to configure it correctly?ThanksHave a good day. Aurélien 

Hi everyoneWe have designed a custom board around the STM32L081CZ and produced 3 prototypes. On the first board I started testing and debugging using STM32CubeIDE on Windows. This worked fine but only with ST-Link, not with J-Link.After testing (and fixing) our hardware, we wanted to program our boards on Debian using Zephyr. I gave a second board (with identical hardware fixes) to my colleague and he was able to program it with a J-Link using West without any problems. My initial board however, that I can still program using ST-Link however does not work using the J-Link (tried West, J-Flash and STM32CubeProgrammer). We since tested the third board and it also works fine with the J-Link.I used ST-Link with STM32CubeProgrammer to connect to all three boards and verified that they are all in the same state (Option Bytes and Registers). I have added a screenshot where I connect first to the device that only connects to ST-Link (Time: 16:33) and then to the one tha

Above is the configuration of my Timer. - To generate pulse, first I used HAL_TIM_OnePulse_Start but with that pulse was not generate.- So I did this: while(1) { HAL_TIM_PWM_Stop(&htim17, TIM_CHANNEL_1); __HAL_TIM_SET_COUNTER(&htim17, 0); HAL_TIM_PWM_Start

I'm currently learning embedded systems and using  NUCLEO-F411RE to start off.I tried using micro-usb b to c for my macbook and it looks like the micro-usb b would not fit on the board. It says micro usb b on the nucleo form but it looks like it's wrong. Can anyone help me please?

Hi All, Hoping someone can clarify my confusion on the clock input for the TIM1 counter...background:I am testing Tim1 output compare by toggling PA8 on the micro... - the timer settings areperiod = 1600, no clock divisor or prescaler and my clock config is belowOn the scope I see PA8 toggling with a period of 25us which seems kind a strange... So even if I assume a counter clock of 150Mhz (APB1, APB2 peripheral clocks) and the formula of clock/2*(period+1) as the frequency I should see it toggle at 21.34 us? Why this discrepancy?? Thanks! 

Hello, is there any possibility to get the pin configuration table for the STM32U535VE  in CSV or Excel format?Thanks a lot !Ricos

Hey!I'm working on implementing USB host functionality on the STM32U545 using the USB_DRD_FS peripheral. I've got the basic structure working, but I'm stuck at the enumeration stage, where the device responds with NAK to SETUP packets and enumeration never completes.As I'm using the dev boad which has no power, I'm using an external 5V supply on USB VCC and GND pins to use host mode.I ahve been trying the stm32u5xx_hal_hcd HAL file to get it working. Here's how I'm doing it:First, I'm keeping these structures:typedef struct { uint8_t dev_addr; uint8_t ep_addr; uint8_t ep_type; bool in_use; } channel_info_t; static channel_info_t _channel_info[FSDEV_EP_COUNT]; static uint8_t find_free_channel(uint8_t dev_addr, uint8_t ep_addr) { for (uint8_t i = 0; i < FSDEV_EP_COUNT; i++) { if (!_channel_info[i].in_use) { return i; } } return 0xFF; } static uint8_t find_channel(uint8_t dev_addr,

On the STM32F303K8, is it possible to configure e.g. PA8 to both receive an EXTI interrupt on falling edge and act as the TIM1CH1 input to trigger source TI1FP1, in turn serving as a timer gate for gated mode? I cannot find a way to express this through MX, which usually means it isn't possible at all, but perhaps it could be done through explicit HAL calls.

Hi i am working on a project with STM32H7A3VGT6 chipset which has LTDC controller. my goal is to make a LVGL based UI with SquareLine Studio and interface a 24 bit parallel RGB display with it . so i have made a UI using SquareLine Studio and imported to my project but the issue is when i try to build it it says flash overflowed. i know that the UI takes so much space but the spec of STM32H7.. says it mas  1 MB RAM . later in the linker script i saw it uses dual bank flash not single , so can i use it like this to make it work ? and any one can explain why is the RAM is also divided? MEMORY { ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /*FLASH2 (rx) : ORIGIN = 0x08100000, LENGTH = 512K*/ DTCMRAM1 (xrw) : ORIGIN = 0x20000000, LENGTH = 64K DTCMRAM2 (xrw) : ORIGIN = 0x20010000, LENGTH = 64K RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 1024K RAM_CD (xrw) : O

Post edited by ST moderator to be inline with the community rules for the code sharing. In next time please use </> button to paste your code. Please read this post: How to insert source code.Hi,I am new to STM32 and I have to do a data acquisition board project using the STM32H7 MCU.I have the STM32H753XI-EVAL evaluation kit and I am trying out all the features one by one.I'm currently working on the DAC, which I have configured on CHANNEL2 on PA5. I am trying to start it up, send it a value, and then get its value to check and measure it using a voltmeter on PA5 of CN6 on the evaluation board.DAC1_Init :  static void MX_DAC1_Init(void) { /* USER CODE BEGIN DAC1

Hello all,I’m hitting a USB edge case on an STM32H573 in the 68-pin package (no VBUS sense pin, no VDDUSB domain).My setup (works fine in application):The product is self-powered (3V3 is always on). Because the package has no VBUS_SNS, I detect bus presence with a VBUS → resistor divider → buffer → GPIO (interrupt). My firmware only enables the USB device and D+ pull-up when this GPIO says VBUS is present, so we don’t “attach” or back-power a sleeping PC. That part is solid.The problem (ROM bootloader only):When I enter the System Memory bootloader and select USB DFU, the ROM seems to bring up the USB device and assert the D+ pull-up even if VBUS is absent (e.g., cable plugged into a powered-off PC or an unpowered hub). That effectively signals attach and can source current toward the host through D+/ESD paths—i.e., not USB-compliant

Hi,I want to use LPTIMx to output a PWM signal that changes duty cycle on each period with DMA. The HAL driver implementation for LPTIM PWM is completely wrong, so I tried to find out how to do this from TRM etc.LPTIMx has 3 DMA request events:2xCCRx: Can only be used in input mode for input capture, not with output.1xUP: Update event, which is exactly what I need here. However, it is not a regular single/burst transfer but some sort of hw block mode (DMA channel needs to set BREQ=1 to connect to this request line).LPTIM has another special thing: It only requests a new DMA request once the ARR register is written.So I can write a single register (it does not support burst), and it needs to be ARR or I will never get another DMA request again (with dest address set to ARR register):  /* GPDMA2_REQUEST_LPTIM1_UE Init */ NodeConfig.NodeType = DMA_GPDMA_2D_NODE; NodeConfig.Init.Req

Hi, For a reason that I cannot explain, the STM32U575ZI (on the nucleo board) is sending a CAN bus message with infinite repeats and 100% bus utilisation, but I have repeated transmission turned off (DAR bit set to 1) and I have confirmed this using the debugger. It continues to send this message at full rate even if I pause the device in the debugger. My code is configured to send a packet with a changing ID from 0 to 4, but the repeated message always has the same ID (0x1, the first message that was queued), indicating that the message is stuck in the TX FIFO. FDCAN_TXBRP is always 0x1. Interrupts for the FDCAN peripheral are not enabled.   I have the following code as my main loop: if (HAL_FDCAN_Start(&hfdcan1) != HAL_OK) { Error_Handler(); } FDCAN_TxHeaderTypeDef header; header.Identifier = 0; while (1) { const uint8_t tx_data[] = {0x01, 0x23, 0x45}; while (HAL_FDCAN_GetTxFifoFree

Hi I'm playing around with the RTC & tamper peripherals of the NUCLEO-H7S3L8. I'm wondering if the TSOVF can be set when multiple tampering are detected in VBat mode ? If I'm not mistaken, the RM doesn't say anything against it. However, using the RTC_Tamper example, I notice that it's not the case. When connecting back the main power, the tampering is detected and the timestamp generated corresponds to the first event but TSOVF is not set.Could anybody confirm that behavior ? Regards.