STM32 MCUs Products

Hi everyone,I’m trying to generate a square wave using TIM5 Output Compare (OC) on an STM32H7 board. I configured TIM5_CH1 to output on PA0, both in CubeMX and manually in HAL_TIM_MspPostInit(). Here is a snippet of my GPIO init: GPIO_InitStruct.Pin = GPIO_PIN_0; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Alternate = GPIO_AF2_TIM5; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);And the TIM5 channel configuration:sConfigOC.OCMode = TIM_OCMODE_TOGGLE; sConfigOC.Pulse = 3749; HAL_TIM_OC_ConfigChannel(&htim5, &sConfigOC, TIM_CHANNEL_1); The problem is that the square wave always appears on PA1, not PA0, even though I haven’t configured TIM5_CH2 anywhere.I checked the

Hello,I am working with STM32H743, using ADC1 and 2 in dual simultanious mode, using DMA to store data from ADC_CDR (2 16 bit values) to memory, some hundred values in a stream in continuous mode. This works fine in general but I frequently see a missynchronisation between the two ADCs so that at the output of DMA I have in one 32bit word the lower half word from one ADC1 conversion of one point in time and in the upper half word the ADC2 conversion from the preceeding or succeeding point in time (I didn't check which of the two, but it is only one of them).I read RM0433 ADC section up and down and could not find anything about that. It seems to be more related to hardware, that sometimes triggering DMA does not properly wait for both ADCs to be ready and have their data transfered to ACD_CDR. But it is not occuring or not from sample to sample but it is there for one complete data stream or not, so it seems to be set or not with every setting of ADSTART.

Hello Community, We are using an STM32U595ZJT6Q microcontroller and have connected an MB85R4M2TFN-G-JAE2 FRAM via a parallel interface. The setup works well under normal operation and even after a power cycle — all data is retained and verified correctly. However, we are facing a consistent issue when performing a microcontroller reset (MRST) without power cycling the board: After MRST, the data at address 0x00 in FRAM is found to be corrupted (0xFF). All other memory locations remain intact.

 Hello ,I am working with comparators on the STM32L496VGT6 microcontroller.In my setup:COMP1 is configured for rising-edge detection.COMP2 is configured for falling-edge detection, forming a window comparator arrangement.One input of COMP1 is connected to an ADC voltage (through a 2:1 voltage divider).The other input is from the DAC internal connection, operating in sample-and-hold mode with the output buffer disabled.The outputs of COMP1 and COMP2 are routed to external GPIO interrupts.Hysteresis is set to medium.Voltage levels:VH = 0.55 V (correspo

As the subject line says, I've written a USART driver for a STM32H755 project where I want to detect a special end-of-line character, for implementing a simple command-line interface.Originally this used DMA with the USART FIFOs disabled, but I recently changed the driver to use the 16-deep FIFOs with FIFO-threshold interrupts, because I am bit short on DMA channels.I couldn't figure out why the character-match interrupt wasn't firing, so I paused execution to look at the USART registers after sending a short (12 characters) command from my serial terminal.  I then refreshed the register view while looking at USART->RDR and was able to see the characters stored in the FIFO come out one by one.Finally after the 12 bytes my "match" character appeared in RDR and then the CMF bit was set in ISR.  This was what I was afraid of.  The RM alludes to the fact that the receive FIFO stores some flags along with each received character.  Well, apparen

Hello,  I have an STM32L4R5 MCU on a custom PCB and I have flashed it with my firmware via USB_OTG_FS. Both CubeProgrammer and the CubeIDE have worked in flashing the MCU for me, given I have an ST-LINK connected to it as well. I have USB_DM, VBUS_Sense, and USB_DP pins set up on my MCU. I am wondering how I can see some sort of output from my MCU. From my searching, I learned the DFU mode is only used for flashing and something like USB CDC is used for communication, through a serial port or UART. I am wondering some ways (preferably efficient and quick) I can go about seeing an output from my MCU that is running my firmware. If there needs to be any more clarification as to my wiring/setup, I will gladly add that. Can USB CDC be setup via firmware, or is it solely a hardware configuration? I do not have pins like UART/LPUART TX/RX connected on my MCU, however, they are able to be jumped of course. I have been using a NUCLEO development board to test my code

Hello guys,Can anyone help me on how i need to set up a dma chain reaction so i can read from a timer ccr1, ccr2 registers and write their values to hrtim period and compare1 registers? The only thing I have found until now is how to set up the dma for the timers while being on PWM Input mode, burst read the cc1, cc2 registers and store their values to memory. I have read that I need to use then a DMAMUX request to generate an DMA request for the HRTIM to read the memory and then apply the changes to the peripheral, but I still don't understand how I should i configure the board. I'm using an STM32G474RET.Thanks for your time in advance.

(Please ignore the green area, which is Layer 1 of the LTDC.）I am using an STM32N6570 development board with an external PSRAM (connected via XSPI1) to store camera frame buffers. I have implemented a double-buffering scheme where the DCMIPP writes camera frames into the external PSRAM buffers and the LTDC reads from them for display.However, even with double buffering, I still observe screen tearing. I have tried:Switching the LTDC display buffer only during VSync (vertical blanking)Cleaning the CPU D-Cache before updating the LTDC addressDespite these measures, tearing persists. I suspect the cause is related

Hey!I'm trying to create a driver for the STM32U545 for TinyUSB . Currently, theres a driver existing for device mode, and theres driver for the boards using synopsys and not usb_fsdev. I have followed the reference manual, and gotten so far:hcd_stm32_fsdev.c (the driver itself) stm32_helpers.h (helper function for different accesses)  It detects the device, and starts sending some data, but then it just stops. Here's full stack trace:[13:54:09.609] Welcome to our controller![13:54:13.617] [0:] USBH Device Attach[13:54:13.771] Device unplugged while debouncing[13:54:13.930] [0:] USBH Device Attach[13:54:14.133]

I am currently working on a project that uses the STM32U575CGU3 microcontroller. The goal of the project is to display pressure and temperature values over CAN J1939 and CANopen communication protocols in a digital output format. For sensor data acquisition, I am using an external two-channel ADC to measure pressure and temperature values. Regarding the system clock, I have tested the application using both the internal clock source and an external crystal oscillator. The system performs well in both configurations. However, I would like to request your expert guidance on the recommended clock source for this application. Specifically: Is it advisable to use the external crystal for better timing accuracy and long-term stability? Or is the internal clock sufficiently reliable for CAN J1939 and CANopen commu

Affected doc / sectionRM0492 (STM32H503) → General-purpose timers → Master mode selection (MMS) (TIMx_CR2.MMS = 0000 “Reset”)Current wording (verbatim)“MMS = 0000 – Reset: the UG bit from the TIMx_EGR register is used as trigger output (tim_trgo). If the reset is generated by the trigger input (slave mode controller configured in reset mode) then the signal on tim_trgo is delayed compared to the actual reset.”Why this is confusing / misleadingThe sentence suggests TRGO is tied to the EGR.UG bit. In reality, EGR.UG is software-only; hardware reset does not set EGR.UG. TRGO is driven by the update-generation path (UEV/UG-equivalent internal signal), not by the literal EGR bit.It does not state that with URS=1 (CR1.UPDATE REQUEST SOURCE), a reset from TRGI/ETR does not generate a UEV. Therefore, with MMS=Reset, TRGO is not emitted at the moment of reset; it only appears on a later UEV (e.g., ov

why need to monitor txe flag and btf flag to transfer data after each byte.txe says data register is empty,btf  and txe says need monitor after last byte. according to reference manual.but my question is how should i know i get ack after sending 1 byte .in this case which should i check txe,btf.if i check txe if txe==1 i send 2nd byte then how should i know i get ack for byte1.if txe indicate about ack flag received/not ,then why should compulsory use btf flag at end of last byte to check wait untill btf==1 before stop condition.     

I’m implementing an audio clock source switching mechanism where the system runs on the internal audio clock if no external clock is detected. As soon as an external clock becomes available, it switches to use that external clock source.This works initially, but when the external clock is lost for any reason and the system switches back to the internal clock — then later detects the external clock again and switches back — I notice that data is still being received through the SAIs, but the clock is no longer synchronized with the external clock source. It seems to continue running from the internal clock instead.Is what I’m trying to do here actually possible? void SwitchAudioMode(eAudioClockSelection::Enum ClockSelection) { if (gAudioMode == ClockSelection) { return; } else { gAudioMode = ClockSelection; } HAL_SAI_Abort(&hsai_BlockA1); HAL_SAI_Abort(&hsai_BlockA3); HAL_SAI_Abort(&h

I would like to set a 1Hz signal on the PC14 (RTC_OUT_CALIB). I have found a manual in document AN3371 (see picture in appendix). The code is also in the appendix. Unfortunately, nothing happens on the PC14 but the RTC works. If anyone has any idea what else to add here, thank you, greetings, SF

HelloCan the STM32H743 modify data at two non-consecutive peripheral addresses in a single DMA event，A DMA event changes two peripheral addresses，

Hello,I'm trying to port the ST IMX335 camera driver middleware to work with the RPi 2 IMX219. Everything works well with the IMX335, however after adjusting to reflect the IMX219 registers I get no image data and a Lane 0& 1 control error flag as soon as I enable streaming.I've switched to using Dump Pipe 0 and reduced the CSI speed but it made no difference.I'm using binning and a reduced ROI to reduce the amount of data coming off the camera. Has anyone has a similar issue?Thanks  

Hi everyone,I would like to know if it’s possible to debug an STM32 microcontroller without using an ST-Link, but instead with an FTDI FT4232HQ chip via its JTAG or SWD interface.If this is possible:How can I configure the debugger connection?Can it be done directly from STM32CubeIDE, or do I need to use another tool (like OpenOCD or GDB)?Thank you in advance for your help!

Hi!I'm struggling to wrap my head around timers - I am trying to schedule some ADC reads of a current sense amplifier in a motor control setup.I have three center-aligned PWM waveforms being generated by Timer1, which successfully commutate a BLDC motor. That's great. I would now like to schedule an ADC read once per PWM period. A simple first try at this would involve a single read right in the center of the PWM waveform. A slightly swankier version would be to calculate the largest duty cycle of my three PWM phases, and schedule my ADC read just after this point (but, again, just once per PWM period). I have experimented with configuring Timer1's TRGO to "Update Event", and scheduling my injected ADC read to be "Timer 1 Trigger Out Event". This, however, schedules the read at the beginning of the PWM period, rather than in the center of it. I'm also experimenting with setting up a slave timer - the idea being to trigger this second

Hello, dear community!I have a problem with adding more than one button to my STM32 Button Box / joystick with buttons. I am using USB HID.I made it as simple as possible - only two buttons, simplest descriptor. The problem may be trivial, but after 4 days and ~8 hours per day - I can't find solution. I watched most of the STM32 USB training course (on yt), I was digging deep in st forum and google/bing/yahoo, but nothing helped. I think there is not a ready answer to my problem in the whole internet.About the problem: One button (the first one) is working flawlessly, but when i try to USBD_HID_SendReport for another button - nothing happens. My descriptor:  // HID Report Descriptor 0x05, 0x01, // Usage Page (Generic Desktop) 0x09, 0x04, // Usage (Joystick) 0xA1, 0x01, // Collection (Application) 0x15, 0x00, // Logical Minimum

I am using NUCLEO-G071RB. I am trying to generate an PWM pulse. I am using TIMER 3 Channel 2. - Clock Frequency = 64 MHzWith this setting I should get a HIGH pulse of 90 micro second, instead I get 80 or 40 micro seconds. When the Pre-scaler is increased to 640-1,  I received HIGH pulse of 980 and 920 micro second which was also not accurate.

Hi,Trying to set Option Bytes over USB with DFU protocol to STM32G0C1VET6's embedded System Bootloader results in a LIBUSB Pipe Error.Steps to reproduce with details captured further below:Fully erase user flash using STM32CubeProgrammer connected to target via SWD through J-Link.  This erases the user flash (512KB at 0x08000000).  Option Bytes are at defaults (128-bytes @ 0x1FFF7800).  OTP is at default (1K @ 0x1FFF7000).Remove J-Link USB connection.Power-cycle target.Enumerate target's USB (D+ is PA12, D- is PA11) to host.  Since flash is empty micro enters embedded bootloader regardless of the state of BOOT0 pin.Host sees USB DFU device.`lsusb -vvv` shows DFU device with 3 interface descriptors:alt 0 is: @Internal Flash /0x08000000/256*02Kgalt 1 is: @Internal Flash /0x08000000/256*02Kgalt 2 is: @Internal Flash /0x08000000/256*02Kg`dfu-u

Hello ST Community,I'm working on implementing USB Audio Class 2.0 with both speaker and microphone functionality on STM32WBA65 using USBX middleware.Request for Example: Are there any complete working examples of USBX Audio Class 2.0 with microphone streaming (USB Audio input) for STM32WBA series? The existing examples I've found only demonstrate speaker/playback functionality.Current Issue: I have implemented a USB Audio Class 2.0 device configured for both speaker and microphone, but only the speaker is working.The device descriptor is correctly recognized by Windows 11:Both speaker and microphone appear in Windows audio devicesSpeaker functionality works correctly (playback stream activates when selected)No Windows system crashes or USB enumeration issuesProblem: The microphone stream

 Hello there, I use USB CDC interface and I am sure that all my configurations are okey. There is no problem about connecting and data transfer between windows and my system, but there is a problem about descriptors such as "Manufacturer" or name of comport. There are no problems about vendor id or product id. In Linux I don't have any problem about it, so I tried to find a solution about this problem in windows and installed ST's comport driver (STM32 Virtual COM Port Driver).  After I updated the driver I saw comport name as "STMicroelectronics Virtual Comport" and manufacturer as "STMicroelectronics" but these are not the configuration macros that I set. As I said there is no problem in Linux, so I tried to solve the problem is on another way.  Finally I tried to write an "inf" file as an driver to solve the problem. I wrote the driver for specific purpose but can't use the driver because it wasn't signatured. I know

Hi, I run ADC1 with DMA on my STM32F303RE with 72MHz clock.  I take the number of samples flowing into the circular buffer per timeunit.  I calculate a sample freq. of 1.305 Megasamples per second Ms/s. When I look at the sampled known signal I calculate a sample frequency of 1.518Ms/s. I'm losing samples somewhere !?  Where? Is it due to ADC or DMA?  ADC setup: Independent mode,Synchronous clock mode divided by 4, 12Bit, scan disable, continuous enable, enable regular conversions enable,  DMA setup: ADC1 DMA1 CHANNEL1, circular buffer 15*1024*uint16_t, increment address memory, half word THX Cheers Detlef  

Hello,I recently replaced an existing STM32F767 MCU with a new STM32H753 MCU in my project that involves SPI communication with an FPGA using 16-bit data frames. After the replacement, I encountered issues with SPI read/write timing and overall communication stability.MCU and Clock Configurations- Original MCU (STM32F767) clock settings: SYSCLK 216MHz, HCLK 216MHz, APB1 54MHz, APB2 108MHz.- New MCU (STM32H753) clock settings: SYSCLK 400MHz, APB4 200MHz, APB2 100MHz, APB1 100MHz with SPI clocks muxed at 200MHz.SPI Initialization on STM32H753The STM32H753 SPI is configured mostly similar to STM32F767 except for the NSS pin setup:- STM32F767 used SPI_NSS_SOFT with manual GPIO control.- STM32H753 uses SPI_NSS_HARD_OUTPUT.- The rest of the SPI parameters (master mode, 16-bit data size, clock polarity/phase) remain identical.SPI Initialization Code Example (STM32H753)=========