STM32 MCUs Products

Hello! I am trying to enable SPI communication through the SPI3 interface on an STM32F103ZFH6. I am aware that pins PA15 and PB3 are used for JTAG and SWJ, but I have disabled both using:GPIO_PinRemapConfig(GPIO_Remap_SWJ_Disable, ENABLE); There is no clock signal on SPI3_SCK (PB3) and the pin is always low, as confirmed by using a logic analyzer. The SPI3_NSS pins work, after disabling JTAG though.I am certain that the SPI settings, clock, and initialization are correct because data is being sent on the MOSI line, and the NSS pin is manually pulled down correctly during communication, just the clock signal is missing. GPIO settings are also correct as the SCK pin is set to GPIO_Mode_AF_PP. I have also probed for continuity on the PCB and everything is correct. There is a series resistor on the MOSI, MISO, and SCK lines. I have added a screenshot of the logic analyzer output I get. Curren

Hi, ST.I want to know if the stm32h7(h750vb) series supports sdio? The spec sheet only describes the SDMMC peripheral (memory card etc.), but I want to use SDIO in my project to connect with esp32 to use WIFI (using esp-hosted library). I want to know if there is a way to achieve it?Thanks!

For application benchmarking, I would like to access the data memory of the STM32F466RE in a single cycle.What is the data load latency of the STM32F466RE from data SRAM at 84MHz?and, if it is not single cycle, can I reduce the core frequency to decrease the number of SRAM access cycles?Thank you.

I am unable to find documentation on the different registers for hardware. I see registers like `TIM2->CCR1` mentioned everywhere, but I can not seem to find docs for it.Does someone have an idea where I can find the documentation for registers and functions?

Hello!I am using the STM32WL55 microcontroller and the NUCLEO WL55JC1 development board. My goal is to resume execution after a low power mode through a LoRa radio reception. In run mode, the microcontroller can exchange radio signals. My problem is that once the microcontroller enters low power mode, the radio cannot wake it up, and the microcontroller remains in low power mode. I have tried various low power modes: sleep, stop 0, 1, 2 without success.Before entering low power mode, I enable the radio in reception with Radio.Rx(0), but the Rxdone interrupt function is not executed. Does anyone know a way to solve this problem? ThanksHere example code:...Radio.Rx(0); /*Radio Continue receiving*///none of them wake up after radio signal// Go into STOP0//HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPENTRY_WFI);// Go into STOP1//HAL_PWR_EnterSTOPMode(PWR_LOWP

Hi! I'm working in an application where I want to start a series of ADC conversions every 10 seconds, take a hundred samples and stop the conversions. The way I thought of it is to use a timer (timer 1 in my case) to measure the 10 seconds and use another timer (timer 3) to trigger the ADC conversions. Once the 100 conversions are made, the timer 3 stops until the timer 1 counts to 10 seconds again.The problem that I have is that the timer 3 does the cycle only one time and after disabling the time base inside the ADC callback function I can't start it again from the TIM1 callback function. This works fine only if I don't use HAL_TIM_Base_Stop(&htim3).Am I doing something wrong or this method is not possible?    void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim){ HAL_GPIO_TogglePin(GPIOA, GPIO_PIN_9); HAL_TIM_Base_Start(&htim3); } void HA

I am looking to stream audio over an ethernet connection to a cellular hot spot.  This will be low latency.  Can someone tell me what STM32 firmware library I should use and if this is an appropriate hardware for that task? Thanks

Hello, VDD50USB on STM32H755II is powered from external 3.3V supply. What is the general use current consumption of the internal USB regulator? Thanks!

I am using stm32f103c8t6 microcontroller for uploading the bootloader and application. After uploading the bootloader binary code using UART communication (boot1=0 and boot0=1) to the controller, the reset pin is not working for further functionality i.e it is not erasing the current program and the uploaded code is working after pressing the reset button. Please guide me regarding that problem.

I need to generate the millivolts of range between (-10mv to 100mv) with three decimal point accuracy using 24-bit external DAC interfaced with NUCLEO-L496ZG board. Is it possible to generate the range?I need HeadsUp & suggestion to achieve the mentioned,Note: yet to purchase DAC

 hi i used of CRC in stm32CubeMX and for check true worked CRC used of two online CRC calculator site:https://www.sunshine2k.de/coding/javascript/crc/crc_js.html&https://crccalc.com/?crc=123456789&method=&datatype=0&outtype=0 i think stm32cubeIDE internal CRC use of standard CRC32_MPEG2:Polynomial = 0x4C11DB7Initial value = 0xFFFFFFFFFinal XoR Value = 0x0Input reflected = disableResult reflected = disableAm I correct and have I written the CRC parameter values ​​for stm32f103 exactly right?...........but CRC result for stm32CubeIDE different with online CRC calculator site?

Hi, I am currently working on configuring the OSPI clock for the STM32U5A9J-DK board, and I have some questions regarding the configuration. From my understanding, based on the Clock Configuration tab in the STM32CubeIDE (.ioc file), the clock going to the OSPI is 48MHz, which can be derived from either MSLK, SYSCLK, PLL1Q, or PLL2Q. In my case, as shown in the attached image1, the clock source is SYSCLK. Now, the actual clock output on the CLK pin of OSPI is further divided by the Clock Prescaler. In this particular case, the OSPI clock is SYSCLK/2 = 24MHz (as I have set the prescaler to 2) as attached image2. In the application, I am using the following initialization: /* USER CODE END OCTOSPI1_Init 1 */ /*

I working through issues on an STM32G4 where at times I'm not getting the reaction time from the DMA that I would like. I read AN2548, and it is a very helpful resource. However, I'm seeing slightly worse response times than AN2548 would suggest, and I'm wondering why. I set up a simple program to test latency, which is to set up a dma request generator that triggers off EXTI and sends a burst of on-off values to a GPIO. I've set the CPU to doing nops during this burst so that there is no bus contention. I found that the initial response takes about 11 cycles and the repeated values take 8 cycles each at 170 MHz, both with no jitter. It seems from AN2548 I should expect 6 cycles for each. In addition AN2548 suggests "The reasonable and recommended safety margin for this occasion is 50%, leaving one‑third of the total bus capacity in reserve". I'm wondering how to calculate this capacity. Is it 170e6/8 due to seeming 8 cycles per transaction?

I would like to use TIM1 and TIM3 as a performance counter to evaluate my software application.  Is there an example of how to configure TIM1 and TIM3 to chain their 16-bit counters to create a 32-bit counter?From reading the reference manual, I can how to trigger TIM3 from an internal trigger signal, but I did not see how I can set TIM1 to pulse a single cycle on the trigger line upon overflow or a compare of the counter to 0xffff.I am using the STM32C031C6.Thank you.

Hi, I am using linked list mode for circular buffering DMA with Timer1 in burst mode. The expectation is that after 300 transfer from memory to timer 1 CCR register, the DMA should start again with the buffer. To do that I need to use Half Trasfer interrupt and Transfer complete interrupt to elaborate the buffer.  It happen something strange, I receive interrupt for each data transferred from memory to peripheral, instead of the half/complete transfer, so I cannot process the buffer. Here is my configuration:   //Setting of DMA Burst for Timer dmacfg.Request = req; dmacfg.DestAddress = dest; dmacfg.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH; dmacfg.BlkHWRequest = LL_DMA_HWREQUEST_BLK;//LL_DMA_HWREQUEST_SINGLEBURST; dmacfg.DataAlignment = LL_DMA_DATA_ALIGN_ZEROPADD; dmacfg.SrcBurstLength = srclen; dmacfg.DestBurstLength = dstlen; dmacfg.SrcDataWidth

I am testing Rx handler logic on a STM32H7 based board. Pins PD0/PD1 are set as Rx/Tx (huart4) with Global Interrupt set. The uart is setup to interrupt on Idle...HAL_UARTEx_ReceiveToIdle_DMA(_uart, _JoyRxData, BROADCAST_CMD_SIZE);and the interrupt is reset inside callback HAL_UARTEx_RxEventCallback(UART_HandleTypeDef * huart, uint16_t Size) I tested the serial connection and handler logic with the STM32H7 board connected to a PC (via USB-TTL converter), and separately with it connected to a OpenCM9.04 development board. When the STM32H7's Rx/Tx pins are connected to an OpenCM9.04 development board's Tx/Rx pins, the callback fails to trigger, even though uart->RxState changes...- When uart is initialized, and HAL_UARTEx_ReceiveToIdle_DMA is set, uart->RxState changes from HAL_UART_STATE_READY to HAL_UART_STATE_BUSY_RX. (the UART is now waiting for data Rx)

My STM32F401CCU6 has 256K flash memory, and I want to use it to store some data. Trying to create a user kept pausing the program at the hardfault handler when I tried debugging. Where am I going wrong? Are there any good resources for this microcontroller regarding using the flash memory to store data?  #include "user.h" #include <string.h> #include <stdio.h> #include "stm32f4xx_hal.h" #include "stm32f4xx_hal_flash.h" #define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08040000) #define FLASH_USER_START_ADDR ADDR_FLASH_SECTOR_6 #define USER_SIZE sizeof(User) void createUser(const char* userID, const char* password, uint8_t tier) { if (userExists(userID)) { return; } User newUser; strncpy(newUser.userID, userID, USER_ID_LENGTH); newUser.userID[USER_ID_LENGTH] = '\0'; strncpy(newUser.password, password, PASSWORD_LENGTH); newUser.password[PASSWORD_LENGTH] = '\0'; newUser.tier = tier; HAL_FLASH_

 Dear all,for the past few weeeks, I've been trying to get the STM32H753VIT6 up and running with the USB3320 ULPI interface but I have not been succesfull. First, I have tried to run a CubeMX generated USB CDC example to test the functionality, but the device was not detectable by a PC, yet the generated code was running, not hanging at any exception.After this, I was intending to test the basic functionality by reading the interface registers (the VID in this case). For this, I have used the undocumented, but known, functions that popped up in STM's low power code for the HAL. I know that using undocumented functions pointing to undocumented registers is far from optimal, but there are no other oprtions that I know of at this time. With this, I have been able to communicate with the PHY and read the register succesfully, but, the data seemed to be incorrect. My issue was that while reading the Vendor Identifier register (address 0x00), I get a read result

Hi,playing around a program found hard fault handler on debugging Can anyone help to proceed that 

Hi,We are using the STM32F446RCT6TR together with a ULPI-PHY in an application to be able to use USB-HS. Is there a controller from ST with which we can dispense with the ULPI-PHY if we use USB-HS + USB-FS with otherwise the same properties as the STM32F446RCT6TR?Regards,TR01

Good morning,We designed a LED controller with the STM32C011. We exposed the BOOT0 PIN in our design as followed: Now the first prototypes are potted in without access to the SWD interface and we want to update the firmware via the internal bootloader.Howeve

Hi, I am using stm32H7b0 in my project, can you help me how to create a double buffer for config   1-layer LTDC that uses internal SRAM for frame buffer? if you give me a sample code that would be better.Thank you

Hello community,The CMSIS DSP library supports a 4096-point FFT, but my project requires a 16384-point FFT. I added some extra library files (downloaded from GitHub; these files are written in C) to my project and successfullyperformed a 16384-point FFT. However, the issue is that performing the FFT takes too much time, with a delay of around 27 to 30 seconds. Does anyone have a solution to make this more efficient and reduce the time? 

Hello,I'm having problems implementing the FDCAN peripheral on the STM32U5F9 TFBGA-216 package. The peripheral is present and configurable in the IDE, but none of the registers update during initialization. In addition to my code, I've tried a bare project which only configures the FDCAN, and compared with multiple development kits from the U5 series. Code that is written for this target fails to init the U5F9 FDCAN, but works on a development kit with the LQFP variant of the U5G9. I've confirmed that our supporting hardware is functional—the chip runs as expected outside of this singular issue.There is a recent forum post in which an ST employee noted that the FDCAN on the U5F7 is disabled via hardware, but operable on the U5G7. I'm curious if this problem is reflected on the F9/G9 non-crypto and crypto variants as well? As of right now, the CubeMx still lists the peripheral as present and operable, and there's nothing in the device errata to indicate otherwise.

Have anybody info about this display controllers? We try run one with U599 , but still have issue start valid image.