STM32 MCUs Products

Complete noob in both uCs and C trying to understand how to actually read the documentation and where to look for the answers.I am using CubeMX to generate a majority of my code and using HAL.I have succesfully got DMA transfer to update different timer parameters by following example code from youtube and other locations:Create a data ArrrayTrigger Event Selection :  Update EventSelect TIMxUP DMA request  (Mem to peripheral, Word, Circular)HAL_DMA_Start(hdma, SrcAddress, DstAddress, DataLength)TIMx->DIER |= (1<<8)Ok for most part I am just poking around changing the array and destinations to view the signal results.   Cascading timers;  using timers as the input clock to other timers; using timers to update different registers on other timers.  Just exploring at an extremely basic level. Some timers do not have t

Hi all, Am using STM32L010R8T6 device how to retain gpio state when jumping from main application to bootloader section. i want to retain one gpio pin state from main application to bootloader. How to achieve it. Is there anyway to achieve it. Please help me to resolve this issue. Here is the code for jumping application to bootloader.   void BootLoader_jumpToApp(void) { volatile uint32_t *appVT; // main app's vector table if (g_eeprom->active_image == FW_IMG_B) { // Bank B appVT = (volatile uint32_t *)UPGRADE_APP_BASE; LOG_INFO(MAIN_LOG, "Main APP : Jump to App B %x", appVT); HAL_Delay(TICKS_2MS); g_BootLoaderJumpFlag = JUMP_TO_MAIN_APPLICATION; HAL_NVIC_SystemReset(); while(1); } else { // Bank A appVT = (volatile uint32_t *)FLASH_BASE; LOG_INFO(MAIN_LOG, "Main APP : Jump to App A %x", appVT); HAL_Delay(TICKS_2MS); g_BootLoaderJumpFlag = JUMP_TO_BOOTL

Hi,I understand this has been discussed before, but can we please get an official explanation of how the dma tail pointer works in the Stm32H7 eth mac ip block? It's extremely difficult to write software to support the eth mac when the docs and example drivers are questionable and the actual functioning of the silicon is simply left to guess by a lack of official information. Issue: 2974/3357 RM0468 Rev 3 clearly says that the tail pointer is "an offset from the base", ie, it is not an absolute address or an index of a descriptor (from 0 to max descriptors). This completely disagrees with the cube driver which sets this as an absolute address: https://github.com/STMicroelectronics/stm32h7xx_hal_driver/blob/a7ac5eac41b0c73072401566237ba202f07251cf/Src/stm3

Hello, I have a SPI TX DMA, and I need to do the followingStep 1:start the TX DMA ,Step 2:stop the DMA,Step 3: store the NDTR register,Step 4: modify the size of the DMA SPIStep 5: restart the DMA with the new sizeStep 6: and restore the position of the NDTR register to continue (restart) at the same position as previouslyI guess the last step (6) is not possible ? right ? or is there a way to change the current positionI tried to change it using the __HAL_SET_COUNTER but it is not workingDo I miss something ? Vincent 

I am using a Stm32h523rc mcu, through cubemx I generated a code for Keil IDE, but I cannot flash code through Keil, though the code is compiling, please help me flash the chip.

I am developing a Battery Management System (BMS) for a hybrid inverter solar panel system. I am using the ADBMS1818 IC as the battery management chip from Analog Devices. Currently, I am looking for a suitable MCU for my system. I found that the CYT2B7 MCU from Cypress Infineon fits my system well. However, during the development process, I need to use an MCU from STMicroelectronics. Could you recommend a series that meets my needs? Below are the specifications of the CYT2B7 Thank you for your assistance.

My question today is kind of simple: I am using the SMPS to supply power to the MCU. Can I also use the SMPS to supply power to a NOR flash chip (W25 by Winbond, the exact chip doesn't matter, but it would be 1.8V with at least 64 Mbit size), and the XSPI I/O to communicate with the chip? Or would this use too much power? I cannot find any info on this.

we have assigned a while condition below the given code, even if the condition is false, or the while condition gets 0, the code also does not execute, it stucked at program counter on while only, if I entered a delay of 1 ms, using Hal_delay after While, then only while condition gets execute, I don't know why after hal delay after while condition it working ok, int I2C_ReadRegForCC3Current(uint8_t reg_addr, uint8_t *reg_data, uint8_t count) { //unsigned int RX_CRC_FailForCC3Current = 0; // reset to 0. If in CRC Mode and CRC fails, this will be incremented. // uint8_t RX_BufferForCC3Current [MAX_BUFFER_SIZEForCC3Current] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};//,0x00,0x00}; RX_CRC_FailForCC3Current = 0; // reset to 0. If in CRC Mode and CR

I have been working with the STM32WB5MMG-HTR controller and have configured ADC1_IN4 (PC3) for ADC value readings. However, I consistently receive a stable ADC value of 4096. Could you please confirm whether I am reading the value correctly? I have attached the relevant code for your review./* USER CODE BEGIN Header *//********************************************************************************* @file : main.c* @brief : Main program body******************************************************************************* @attention** Copyright (c) 2024 STMicroelectronics.* All rights reserved.** This software is licensed under terms that can be found in the LICENSE file* in the root directory of this software

I've trying for days to get the LPBAM tool to work. The TempSense example project is similar to what i'm trying to do. I'd like to immediately stop2 on power up and continually sample 3 channels. The first condition i'm waiting for is IN1 > 1100, so i setup a AWD1 no interrupt with a LPTIM period change triggered on rising edge ADC4 AWD1 so i can see it on the scope (no debug in stop2 or at least i haven't figured it out). Then i'd like to switch the analog watchdog to IN2 (haven't been successful reusing AWD1 since i'm done with it nor using AWD2) and here i'm looking for a signal around the midpoint of the ADC (sine wave zero crossing). From what i've read, the watchdog range won't work backwards (trigger inside a range not outside a range) so I set this up as two watchdogs, first going up out of the lower half and then the second coming down out of the upper half (close enough to a zero crossing for me). After these signals have all occurred in that order, i'd like to DMA capt

Hello there!I'm reading the STM32H5 documentation on how to setup the ETH descriptors correctly. At the same time I'm following the HAL for the same H5 series.When the RX descriptors are initialized, I can see the HAL assumes there are 4 descriptors.  /* Set Receive Descriptor Ring Length */ WRITE_REG(heth->Instance->DMACRDRLR, ((uint32_t)(ETH_RX_DESC_CNT - 1U))); /* Set Receive Descriptor List Address */ WRITE_REG(heth->Instance->DMACRDLAR, (uint32_t) heth->Init.RxDesc); /* Set Receive Descriptor Tail pointer Address */ WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t) &heth->Init.RxDesc[ETH_RX_DESC_CNT - 1])); ETH_RX_DESC_CNT is 4 and so, the ring length is 3. Correct.The DMACRDLAR is also pointing to the correct start. I've created 4 ETH_DMADescTypeDef: 

I'm using STM32H733VGT6, STM32F030CCT6 and LTE module. As show as attached picture, it is conneted via UART. I want to recieve data through LTE and connect STM32H733VGT or STM32F030CCT to DFU to download firmware. Is it possible with UART? STM32H733VGT have USB DFU, but I want to use UART. Are there any circuits or materials that might be helpful?

  I am trying to find out whether is it possible to send 64bytes of data in one frame of Multiframe in CAN FD. i.e First frame will have 64 bytes, Consecutive frame will also have 64 bytes in STM32G0B1KBU6 basically in G0 series MCU

HiI'm designing a PCB using the STM32H735 based on the eval kit STM32H735G-DK.On STM32H735G-DK there is both STlink connector and a TAG Connecter, but they are not wired the same way.I have the STlink working but was wondering what type of programmer that will fit on the TAG connecter with the pinout used on STM32H735G-DK? Best RegardsKristian Vang

Hello everyone,I'm currently working on a project using the STM32H723VE microcontroller and have encountered a problem with the SAI1 peripheral. Previously, I developed my code on the STM32H723ZG Nucleo and everything worked perfectly, including the SAI1 callback function. However, after writing the same code to the STM32H723VE, the SAI1 callback function is no longer triggered. All DMAs are configured in circular mode with word data width.What works on the STM32H723VE so far is the SAI4 in slave transmit and the I2S1 in slave receive. SAI4 accesses RAM D3 and I2S accesses RAM D2 while sending/receiving data from DMA.As soon as I include SAI1 slave transmit data in the code, all DMA operations of SAI4 and I2S1 stop. As soon as I stop the DMA from SAI1, everything works again.I am confused because the code worked fine on the STM32H723ZG Nucleo.Here is the RAM allocation for the DMA in the .._FLASH.ld file: 

Posted on March 10, 2017 at 11:16Hi,The communication between single microcontroller and pc is works fine through ethernet tcp/ip . problem occurs only when i connect two microcontroller to a single pc via ethenet cable,Here d-link 5-port 10/100 desktop is used for multiple connection.when connection made for multiple microcontroller ,the communication doesn't work properly.Either one connection will be in active condition other will be inactive.I need solution to overcome this issue.My requirment is from pc it sends query to microcontroller-1 after receiving response from microcontroller-1 .It has send next query to Microcontroller-2.Process should be repeat.Is it possible? If yes please please guide me. Please anyone reply as soon as possible......Thanking You....

Hello,I am using an STM32WB with a custom bootloader, which is currently simple and only knows how to jump to a specific address to start the application. I upload firmware using debuggers (STLink V3 and JLink). When I upload the bootloader and the application separately, then make reset of MCU everything works – the bootloader launches the application, and it seems to run fine. However, if I have the bootloader already uploaded and I upload only the application via the debugger, it often happens that the application does not start (in debug mode). The bootloader seems to be active, probably sending a command to jump to the application (that's just my guess), and in debug mode, I see that the application gets stuck right at the reset handler, and nothing can be done with it. Sometimes switching from JLink to STLink or vice versa helps. It's very frustrating to debug software when most of the time it doesn't work. Do you have any idea what could be the issue?Thank you.

Heyho,for a new project I need an MCU with 2 channels of 16bit / 50kHz ADC.It looks like the F373's sigma delta ADC (SDADC) might be good enough (it will be calibrated for accuracy anyway).But I haven't found any info about the SDADC's digital low pass / decimation filter, and no FFT plots.Can anybody help me out, and/or share their experience with that ADC?

STM32G431RB is in use. If you add frequency: 100KHz, offset: 1V, amplitude: 1V as a function generator and proceed with ADC using MATLAB, the signal is output in offset: 2V and amplitude 2V.    It's a picture of the function generator parameter settings, and when I ran it, I extract

Hi!I have a board nucleo F446RE..I can't to install the st-link driver.can be related to fact that in my laptop I have windows 11? 

Hello community,I'm looking for some direction on how to setup the OSPI bus to communitcate with an external PSRAM part from ISSI - IS66WVO8M8 (datasheet attached). I've read through application notes and a handful of example projects but am having a hard time getting the logic to sync. A few things I've done:The STM32H7 OSPI bus is set to run at 133MHz with no prescalar (133 because of another OSPI peripheral connected to OSPI1 not shown here)The read operation (page 9) and write operation (page 13) show a data ordering D1/D0, so Makronix was selected. Have tried both Makronix and Makronix RAM as the typePage 19 shows the register read operation waveform - DQS should be enabledPage 8 shows the register command and address values, lengths, etc. If you look in the MX_OCTOSPI2_Init function, I am trying to read from the ID register to confirm the correct part, run a quick and dirty write/read check, and then u

This is new. I've used it in the past and downloaded data with no problem.Yes, I do have network connection - this post from the very same PC at the moment.JW

E.g. the FatFs_USBDisk sample does not have a *.ioc file.Maybe not all example projects use STM32CubeMX?(the issue sounds like https://community.st.com/t5/stm32-mcus/creating-stm32cubmx-ioc-project-for-older-stm32cube-firmware/ta-p/49664)How can I enable the view "Device Configuration Tool" for that example project?Or: what's the best way to see the Mikrocontroller resources used by that project?Reason for asking:I can't add support for serial console (including DMA) to FatFs_USBDisk from a reference project. There seems to be a clashing of using the resources.

I'm using an area of Flash in an STM32U5 to store some information that I need to retrieve connecting the board to the SWD port. Data is sent out using the ITM port. All is working as expected connecting the board using the STM32 Cube Programmer, allowing to save data to a file. The CPU can be run and halted.By setting RDP1 this is not possible anymore. Once the board is connected the CPU is locked and I found no way to run the firmware. I suspect this is the normal behaviour to protect access to the Flash, is this correct? I couldn't find specific information on the manuals. Or is there a sequence to have the firmware run when connected to the programmer?I also expect that there's no way to exclude an are of flash from being protected by RDP.

Hi all,when running the same piece of code (math operations with random access to RAM) on the CM4 of the STM32G474 we measure smaller execution times than on the CM4 core of the STM32H745.The STM32G474 is clocked at 168 MHz and uses the SRAM mapped at 0x20000000.The CM4 of the STM32H745 is clocked at 200 MHz (and its CM7 at 400 MHz) and uses AHB SRAM1 mapped at address 0x30000000. How is it possible that the slower clocked CM4 core of the STM32G474 is more performant? Any explanations? Thanks, Marco Accame, Ph.D.iCub Tech Facility, Istituto Italiano di TecnologiaCRIS,