STM32 MCUs Products

Hello, everyone. I'm trying to use an STM32F103C6 to toggle some pins once per second. To this end, I have set up the RTC "seconds" event to fire on the appropriate interval.When busy waiting until the `SECF` bit of `RTC_CRL` is set, it works just fine. But if I busy wait for the appropriate IRQ pending bit instead, it sometimes doesn't work. The specific situation when it works or doesn't is bewildering.The code looks roughly like this:while (true) { while (!nvic.get_pending(Irq::rtc)) {} nvic.clear_pending(Irq::rtc); rtc.clear_secf(); // do other stuff}This works just fine if I compile with `-O1` or `-Os`, or if I leave the `RCC_CFGR` APB1 prescaler `PPRE1` value at its default. It does not work if I compile with `-O2` or higher, and set the APB1 prescaler `PPRE1` to `0b100` or greater.The behavior I observe is as if the pending bit never gets set. But when debugging, I can print the value of the appropriate memo

Hi,I recently bought an STM32H747I-DISCO board and I'm trying to run the JPEG_MJPEG_VideoDecoding code example with an external display. The code works fine with the on-board display, but I'm struggling to get it working with an external display that uses a GC9A01 driver.I'm confident the issue isn't with the new display or its associated code because I've successfully tested it with static JPEG decoding (not MJPEG). I suspect the problem lies within the code example I'm trying to modify, specifically in the DMA2D section. It appears that the external DRAM is not written to during the final phase of the decoding by the DMA2D peripheral. As a result, when I run my lcd_draw() function, it shows garbage on the display.My modifications to the original code involved disabling all on-board LCD functions and replacing them with my own LCD functions.Can you help me understand why it doesn't work?It follows the part of code I modified and an image. 

 I need programming code to my board with STM32_MCU by STM32G4 Nucleo-32 board (MB1430) CN2 PORTI want to use STM32G4 Nucleo-32 board (MB1430) CN2 PORT as st-link debuger without debug self-board MCU.How to do it ?     

I use NUCLEO-F767Z board and was working on a Application Framework that uses RTOS with different tasks, and logging to serial console and USBDisk. This is quite a while ago (STM32CubeIDE 1.6.1). I couldn't make USBDisk work with RTOS then. I switched to other tasks. But now I want to get back to this.Now I see, that in STM32CubeIDE there is an example FatFs_USBDisk_RTOS. This might be what I need. But this example can only be selected for other evaluation boards.Is it possible to port the example FatFs_USBDisk_RTOS to NUCLEO-F767Z for a newbee?When I download the FatFs_USBDisk_RTOS example for a board which is supported, and look at the sources, then I can see that this is not using the API USBH_Init(), USBH_RegisterClass(), etc, .... - for integration with RTOS.Therfore, I guess, there is no use trying to adapt and incorporate the FatFs_USBDisk reference into an RTOS project.Will it be more promising to ta

Hi guys.I am using the guide below for starting communication between two MCU. Getting started with I2C - stm32mcuThe code is simple, but it did not work.Master code:

There is a note for UFQFPN32 package, that says "There is an exposed die pad on the underside of the UFQFPN package.", But there is no similar statement for UFQFPN28 package for the same device. Is it intentional or missed or if there is any plan to add if it is intentional?

I'm trying to use DMA with the USART2 receiver in half-duplex mode but the DMA indicates a device error as soon as it begins even though no error flag is set in the ISR register either before the DMA starts or after the DMA ends, additionally the same code works fine when reading the RDR register in a loop. After the DMA fails the data that it should have received can still be read from the USART. I'm also using the same DMA for USART3 in an identical way aside from it not being used in half-duplex mode. So does anyone know what could be causing this?Here is my code and the output: TMC_UART_Internal.CR1.TE := False; for Byte of Input loop Transmit (TMC_UART, UInt9 (Byte)); Server_Communication.Transmit_String_Line ("In TX FIFO: " & Byte'Image); end loop; Server_Communication.Transmit_String ("ISR: "); Server_Communication.Transmit_String_Line (TMC_UART_Internal.ISR'Image); Start_Transfer (This => TMC_UA

 I generated a project using STM32CubeMX, in which I tried to use SDIO and FatFS. However, it doesn't seem to be working properly. I tried three cards. When executing SD_Driver.disk_initialize(0); the 256MB card (manufacturer unknown) and the 16GB card (Sandisk) would hang for a long time (stuck in the loop at static uint32_t SD_PowerON(SD_HandleTypeDef *hsd)) and return an error with a value of 1. Tracking the issue led to HAL_SD_ERROR_INVALID_VOLTRANGE. Another 512MB card (manufacturer unknown) could pass the initialization, but when reading the information, the capacity shown was only 13MB. Consequently, when trying to use FatFS with f_mount(&fs, "0:/", 1); an error occurred. I tried adjusting the SDIOCLK clock divide factor, but it had no effect.The cards read normally on the computer and can be accessed normally in SPI mode (including using FatFS in SPI mode, which is also normal, but the speed is too slow to meet the requirements). This issue occurs on both the

Dear STM32 Members,How can I read multiple ADC channel on STM32L011 ?I want to read channel 1,3,5,7?How can I define it on STM32CubeMxI can see HAL_ADC_Read， how can I read HAL_ADC(1),(3),(5),(7), what variable is being used ?Is it an array ?Thanks

Hi,I recently bought a Nucleo-H753ZI to test out some of my algorithms that will benefit from the extra compute power. However, I still need to interface with external sensors to read data from it at a very high rate (1kHz). The sensor in question is https://invensense.tdk.com/products/motion-tracking/9-axis/icm-20948/ and I am using I2C to communicate with it. The sensor outputs a DATA_READY signal which goes high when new sensor measurements are available (in total 23 bytes). To ensure minimal CPU overhead I am planning to use DMA, I have used DMA with I2C on Nucleo-L476RG before with great success but I want to try something different which involves minimal CPU effort and from my initial research it looks like a possibility but devil is always in the details.I want to use the DATA_READY signal to trigger I2C DMA reading without using

I have a STM32F755ZI nucleo board. I am trying to load and run simple project from the board selector. So creating new stm32 project and selecting the board. Then i try to load the project and while it seems to load the stlink led blinks 3 colours and the load in the console goes up to finish the program goes to some error handler. In the debug i see the next info Type "apropos word" to search for commands related to "word". Type "apropos word" to search for commands related to "word". set *(unsigned int *)0xe00430a0&=~0x1 set *(int *)0xE000EDFC=*(int *)0xE000EDFC|0x7F0 set *(unsigned int *)0x5c001004|=0x3f Temporary breakpoint 1, main () at ../Core/Src/main.c:107 107 timeout = 0xFFFF; Program received signal SIGINT, Interrupt. 0x08000712 in main () at ../Core/Src/main.c:108 108 while((__HAL_RCC_GET_FLAG(RCC_FLAG_D2CKRDY) != RESET) && (timeout-- > 0)); Program

Background, using STM32F412CG:- we have an external 20-bit ADC triggered by an external conversion strobe- the ADC produces a signal when conversion is complete- external ADC-complete signal must trigger DMA to read the ADC results (20-bit over SPI)- DMA-completion of SPI xfer must trigger a transfer-complete interrupt (enter ISR after data received&ready)I’ve done this with several other vendors’ parts but I’m a newbie to the STM family, so a few questions:I read application note AN4031 on DMA controller use, but I don’t see from this note how DMA can be triggered from an external pin? Any recommended example?How does the 16-bit SPI do a 20-bit transfer using DMA, and trigger an interrupt on completion? (SPI transfers >16-bit are very common so this must be possible)? Recommended examples?Thanks in advance for any pointers,Best Regards, Dave

I have setup a base board of ADE9000 With only Basic Components connected, Like Bypass capacitors, Reset pullups and connected SPI Directly with the STM32F401 Blackpill board , Everything starts-up perfectly.So I want to check the communication between the MCU and AE9000, So To read the Register value at 0x4FE (Version of ADE9000) I am sending 0x4FE8 (8 Is added so as to set bit 3 High For read Command) But I am only getting 0xfffc and 0xfff8 in random patterns.SPI for STM32F4 is set to 16 bits with Mode 0 Configuration and I am checking the data using Logic Analyzer which check out that the data sent from the MCU is 0x4FE8 but receiving is 0xfffc and/or 0xfff8

Hi, Could anyone help with this problem? Its driving me mad!!! I have designed an ethernet interface  for an F746-100 MCU I have changed pins to avoid using Port G and I have used the  circuit below. The RJ45 connector is a standard RB1-125BAG1A and the ethernet chip is a LAN8742A Can anyone tell me if there are any mistakes in this? I cannot get any connection at all - F746-100 will not ping. Green LED ON and Yellow LED flashes continuously. I have an STM32F746 - 144 Nucleo with the same software (apart from the two pins that are changed) -works fine. The 25MHz xtal works OK (same signal on both boards) and the LAN8742_STATUS_OK returns 0  on both boards when I debug. There appears to be no errors in the setup LAN8742.c or the ethernetif.c when I debug. This code works OK on the NUCLEO board and I can display a small webpage. Both sets of code use only ETH and LWIP, fixed IP, on a standard Cubeide

Hello,I am developing a phone application that interfaces with the BlueNRG-M0A bluetooth chip on our custom board, which utilizes an STM32F303RE MCU. We are sending data gathered by the MCU to the phone application periodically (time is flexible, but we're aiming for every 15 minutes). The problem we're running into is that, when the phone is locked, the information is not being received. It seems the phone does not allow applications to request data from the BLE when the phone is locked. I am looking for another method to do this and wanted to see if there was a function in the BlueNRG chip that would help overcome this.  Is anyone aware of a method to send data via BLE to a locked phone?

I have a product that contains 2 STM32F405/07/15/17 series MCUs. There are 2 because we need 4 CAN and that's cheaper and easier than finding a 4 CAN MCU. Anyways, the main MCU is connected to the secondary MCU via UART and the boot/reset pins so that the main can update the secondary via the built in bootloader. This works fine in most cases, except for when the CAN2 of the secondary is connected to an active CAN network, the bootloader seems to detect a CAN frame, triggering the CAN 'branch' of the bootloader, before I am able to trigger the UART 'branch' of the bootloader. As soon as I release the reset pin on the secondary I start spamming the 0x7F learn byte (@57600 baud), but that doesn't seem to help if the bus is any busier than about 2 CAN messages/sec, which in practice it is busier. Obviously the easy way would be to just not have that CAN2 on the secondary connected to a bus, but the product gets installed into a vehicle and disconnecting that bus is n

NUCLEO-F030R8 does not appear in FINDER on Mac Also the option is missing from list of ports Have sucesfully run: sudo port selfupdate && sudo port upgrade stlink However NUCLEO-F030R8 does not appear.  

I am trying to understand how the ECC IRQs work.  I have configure the RAMECC1 AXI SRAM, RAMECC2 SRAM1, 2 and 3, and RAMECC3 SRAM 4 monitor CR registers to generate interrupts on double bit errors.  I have configured the IER so that Global interrupts are NOT generated.I've initialised all but the last 1K of the each of the SRAMs, so that my application can read from these addresses, when requested, to generate a ECC ISR and therefor test the handling of the error.However, I have noticed that the ISR is raised to both cores (CM7 and CM4) regardless of which core performed the memory read triggering the ECC error.Is there a way to configure the ECC or Interrupts so that only the core performing the read gets interrupted? 

Hi,I'm currently looking for a way to identify the MCU attahced to a common pcb used. The MCUs are from the H7 series and im geeting unexpected results, as in they all return the same id 0x450I have tried looking at the DBGMCU->IDCODE, HAL_GetDEVID() and HAL_GetREVID() none provide a unique identifier for the MCU type.I can confirm that if i look at the FLASHSIZE_BASE it is reporting the correct changes in flash size relevant to the MCU.I've also looked at this in cubeProgrammer and get the same common device id across all models.Is this to be expected, ie all reporting the same Device ID ? if so is there any way to identify the model of the MCU?

Hi        We are working on STM32H503 MCU which has ARM Cortex 33. In datasheet it is provided that 12 cycles or instruction to enter into an interrupt function. Configured system clock as 250MHz, with that we could reach an interrupt function within 48ns. But in practical it's taking around 146ns. we have enabled a GPIO pin as high inside the ISR function which takes 5 (20ns) instructions. So, 146ns-20ns = 126ns taking to enter into an ISR function. Please provide me a solution to achieve the interrupt function within 48ns. RegardsBhavan

I am trying to make an I2C slave that returns a fixed number of bytes to master upon being called with a read from the master (7Addr-Bits+1Read-Bit). In Debug-Mode it works, in normal run, it doesn't.I have thrown almost any HAL-functionality out, and wrote most of the code myself (concerning I2C). I only use the HAL to initialize everything, but from there (in the interrupts) I do stuff myself.The problem is: Now it (kinda) works, I get different bytes on the bus from my slave to the master, BUT ONLY WITH THE DEBUGGER CONNECTED. When it is not connected, my slave simply does not ack the addressing-frame coming from the master.main.c:     int main(void) { /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the

Hi everyone,I am observing some data corruption in an external SDRAM connected to an STM32 F7 FMC peripheral and I am trying to understand what is happening and how to prevent it. Scenario:Configure the FMC to interface with a Winbond external SDRAM chipAllocated a static memory buffer in the external SDRAM (somewhere in the 0xC000 0000 to 0xCFFF FFFF region)SDRAM write 1: reset the whole buffer to a known value [memset(0xFF)] to be sure buffer contents are in a known stateSDRAM write 2: immediately after SDRAM write 1, populate the buffer with my data of interestimmediately after SDRAM write 2, read the buffer and notice the data corruption. I.e., in the middle of my data of interest, some 0xFF are still present (figure

Hello ST Community and Support Team, I try to play with Independant Watchdog and Window Watchdog on a Nucleo U575ZI eval board.I was able to configure counters, window and even EWI interrupt perfectly thanks to STM32 HAL library watchdog related functions and see a reset when timeout is too low and no reset when the refeeding is done on time.==> I have now problems setting the correct value to have the expected timeout of around 2 seconds I want. 1) On WWDG, the prescaler schematic is pretty clear and with ST example code with counter = 0x7F and prescaler 64, we expect to have around  209,71ms of timeout with the following formulas :WWDG Counter Clock = PCLK1 / (4096 * Prescaler) WWDG Counter Time (ms) = 1000 / WWDG counter clockWDG Timeout (ms) = Counter settings * Counter TimeSo theorically, with PCLK1 = 160MHz, we can reach only around 41

Heyho,I had probably some race condition, just want to make sure:the buffer switching in DMA's Double Buffer Mode (DBM) (both for DMA and BDMA) occurs immediately with the Transfer Complete (TC) interrupt?So when the DMA's TC ISR is entered (which takes a few CPU cycles), the buffer has already been switched and the CT (Current Transfer, showing if the buffer in M0AR or M1AR is active) has already been switched?STM32H733

Hello,I am using the Cube Code Generator, within the STM32CubeIDE (version 1.13.1) for an STM32H563, and have configured the Flash Data Sectors to use the maximum 8 sectors per bank for EDATA. The valid range for the EDATA sector size is 0 - 7, as shown below. I believe there is a bug within the generated code for the EDATA sector size.STM32CubeIDE Code Generation EDATA Size RangeWhen I choose the maximum value of 7, and follow it through the generated MX_FLASH_Init() function, I am finding that the resulting sector size t