STM32 MCUs Products

STM32L072 – LPTIM1 external pulse counting with LSE in STOP mode not workingDescription:Hello,I am trying to configure LPTIM1 on an STM32L072 to count external pulses from a button connected to PB5 (LPTIM1_IN1). The goal is to keep counting pulses while the MCU is in STOP mode.What I did:RTC is already running from LSE in STOP mode, so LSE is enabled and stable.In CubeMX I selected:LPTIM1 clock = LSE (ULPTIM)Counter source = ExternalGenerated initialization looks like this:hlptim1.Instance = LPTIM1;hlptim1.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC; // CubeMX output, even if I picked LSEhlptim1.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;hlptim1.Init.UltraLowPowerClock.Polarity = LPTIM_CLOCKPOLARITY_RISING;hlptim1.Init.UltraLowPowerClock.SampleTime = LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION;hlptim1.Init.Trigger.Sou

I have written a custom bootloader that is running on a Nucleo-L433RC-P board. The application uses USB CDC to call the bootloader and the bootloader uses USB DFU to download the application. I wanted to use USB to call the custom bootloader, rather than having to use a physical switch on the BOOT0 pin to call the internal bootloaderI can successfully download a simple application which just flashes an LED using the USB DFU bootloader.However, when I download my actual project, it appears to download successfully but does not run.My actual project is more complicated and uses the following peripherals:RTCSPI2 and DAC1 (using DMA)SPI1TIM6TIM7I2C1I2C2USBShutdown and standby using WKUP and RTC wake sources I used the following guide to write the custom bootloader and simple application...

Our STM32H745XIH microcontroller enters an infinite loop after updating the software with “Release” compilation flags (optimization enabled). This only happens with a specific build, and changing a single piece of code that is definitely not related to any hardware component can solve the problem (e.g., adding a single line such as int a = 45;). We believe the problem may be related to the watchdog reset, because when connected to the microcontroller via a debugger, it resets and starts working normally without any problems, the logic of our application works, and the device is fully functional. We thought the problem might be caused by the clock initializing too quickly, so we added a startup delay using: static void __attribute__ ((optimize("-O0"))) StartupDelay(void) { for(uint32_t i = 0x27614U; i > 0U; i--); } This seemed to solve the problem. However, after changing another part of the code, the problem start

I'm attempting to use a custom LCD daughter board designed to plug onto the STM32U5G9J-DK1 in place of the round display that comes with the DK1. The schematics for the DK1 have a note in read indicating that the DSI_CK_N and DSI_CK_P pins are reversed and that they should be swapped in software, and indeed the pin assignments on the schematics seem to agree with that note. The schematics for the round display board show those pins to be correct, i.e. not reversed. I have working example code for the round display, but nowhere in that code do I see that the DSI clock pins are reversed.There's a HAL function for doing this: HAL_DSI_SetLanePInsConfiguration(), and the DSI register that does the swapping is WPCR[0]. Nowhere in the working example project do I find any call to the function or any write to that register, so I'm confused as to how it could be working. Is the schematic not correct? Is there some other means of swapping the pins? Needless to say, my custom board is n

Hi,My battery (++ LTO/Bucks) that runs everything on my PCBA is connected to VBAT (pin 1). Before the connection I have a voltage divider factor of roughly 1.374, but what I read on the pin via ADC1 channel 18 (what VBAT is routed to internally) seems to be non-sensical. With a battery voltage of 3.6V I measure roughly ~1160 mV (after multiplying by 4 and 1.374). When I tried replacing the resistors in my voltage divider by smaller ones I got higher measurement values.VBATEN is enabled in ADC12_COMMON_CCR. Also tried to enable MONEN in PWR_BDCR1, but that didn't make any difference.What's could be the issue here?

The errata for the STM32U575 series includes the following: We would like to use the first option of the 2 listed workarounds (the one that does NOT require disabling and reenabling the ICACHE).  Does ST have any implementation examples of this workaround? I am confused about why it is necessary to put the low-power entry code in a non-cacheable region.  We use a WFI instruction to put the MCU into STOP mode.  If we could ensure that the WFI was in the last 2 bytes of a 16-byte block of memory, would that fix the errata?  This way, the next instruction after WFI (and thus the 1st instruction executed o

I have the STM32N6570-DK board, and I was able to execute the example from:- https://github.com/STMicroelectronics/STM32N6-GettingStarted-ObjectDetectionFollowing the steps provided in the workshop:- https://www.youtube.com/watch?v=29EUWNwfywI&list=PLTJzs51NlEICI7ARAHOyUqMhTgJE0UFv0&index=6- https://www.youtube.com/watch?v=VV9f5e3nqM4&list=PLTJzs51NlEICI7ARAHOyUqMhTgJE0UFv0&index=7---However, after I was able to execute it at first, I tried to conv

In 'F427 (and all RTCv2-containing STM32), some RTC registers are write protected: prior writing to them, it is necessary:1.enable backup domain access by setting PWR_CR.DBP2. unlock a RTC write protection by writing two key values into RTC_WPR Breakpoint 4, main () at rrr.c:37873 37873 int main(void) { (gdb) p /x *RTC $91 = {TR = 0x150002, DR = 0x258717, CR = 0x20, ISR = 0x17, PRER = 0x7f00ff, WUTR = 0xffff, CALIBR = 0x0, (gdb) p /x *RTC $92 = {TR = 0x150007, DR = 0x258717, CR = 0x20, ISR = 0x17, PRER = 0x7f00ff, WUTR = 0xffff, CALIBR = 0x0, --- we see clock is running (RTC_CR.BYPSHAD = 1 so we don't need to worry about the readout locks) (gdb) set RTC->ISR=RTC_ISR_INIT (gdb) p /x *RTC $93 = {TR = 0x150024, DR = 0x258717, CR = 0x20, ISR = 0x17, PRER = 0x7f00ff, WUTR = 0xffff, CALIBR = 0x0, --- we see writing RTC_ISR_INIT had no effect, we haven't removed either of the protections (gdb) set RCC->APB1ENR|=RC

Hello. I am currently developing a board using the stm32f411ret6 chipset. I confirmed that the first firmware download worked properly on one of the boards I am developing. However, after attempting to download the second firmware, I encountered an issue where the option byte was displayed as 0xFF. I tried changing the option byte in various ways, but all attempts failed. Furthermore, I attempted to boot using the system bootloader, but it failed. Could the flash memory itself be damaged?   Below is the link to my initial community inquiry. https://community.st.com/t5/stm32-mcus-products/what-is-the-way-to-fix-stm32f411re-option-bytes-0xff-error/m-p/832817#M284580   Thank you *This post has been translated from Korean to comply with the ST

Hello all, This is my first post on here, if I am in error at any point please direct me to any relevant posting guidelines. I am developing a sender-receiver solution involving two STM32H753 microcontrollers, both on ST's NUCLEO-STM32H753 boards. I am using USART3 to transmit and receive one byte using DMA. The sender receives one byte (for example 'S') and the receiver receives one byte, checks whether it matches 'S', and if it does, it toggles the yellow on-board LED. If it does not match, it toggles the green on-board LED. This check is being done in the HAL_UART_RxCpltCallback() function. I am facing an issue where the first time the HAL_UART_RxCpltCallback triggers after the receiver is reset, it toggles the green LED once (meaning that the received byte did not match with the expected data), and then continuously toggles the yellow LED (meaning that the received byte does match the expected data, this is the desired behaviour

Hello teams,I tried to use STM32N6570-DK DCMIPP Pipe0 to read data from my camera that has own ISP. The camera output format is UYVY (YUV422 BPP16). The issue is that I can't get any data from DCMIPP and CSI-2 Host, I only received SOF and EOF events from CSI-2 Host. I've referred to other people's posts, but my issue still exists. Is my DCMIPP and CSI configuration wrong?Additionally, I'm not sure if the CSI and DCMIPP clock is set correctly, I just follow the example. If my camera out is 640x480@60fps and format is UYVY, how should I configure this clock?My settings are as follows.static void MX_DCMIPP_Init(void) { /* USER CODE BEGIN DCMIPP_Init 0 */ /* USER CODE END DCMIPP_Init 0 */ DCMIPP_CSI_PIPE_ConfTypeDef pCSI_PipeConfig

Hello Team, We are planning to use STM32H7S7L8H6 in our new design.We want to interface IS21EF04GP-JQLI-TR eMMC with STM32H7S7L8H6.So, for this STM32H7S7L8H6 required only 3.3V supply right?It will be to communicate with eMMC IS21EF04GP-JQLI-TR. So, please provide your guidance for this. Thanks & Regards,Jignesh Karena

Hi, I'm already aware of the application note from https://www.st.com/resource/en/application_note/an5354-getting-started-with-the-stm32h7-series-mcu-16bit-adc-stmicroelectronics.pdf but as it does not cover STM32H72*-MCUs, I have to afraid I need to ask it here. I have configured some ADC-stuff for 16 bit data sampling in CubeMX but now get incredible large offsets, even when the ADC-pins are connected to GND directly. That offset is in range 2000..4000 and very instable, means floating about the full range (I except it not to be a noise-problem as for testign the pin is pulled to GND directly). What I have configured in CubeMX: VREFBUF-mode to internal voltage reference Trimming Mode: factory trimming Internal voltage reference scale: SCALE2 (ar

When working with the DCMIPP Pipe0, what configuration must be done in order to receive a frame? I've followed similar steps as to the provided examples in the N6 1.2.0 repository: DCMIPP init -> sensor probe -> pipe start. I've verified my sensor is streaming and its internal frame counter is incrementing. Although, I've yet to see any frame callbacks. I've matched the weak callback implementation in the provided examples.Also, what should PHYBitrate be set to? This is presumably the per-lane MIPI bandwidth, but I've made that assumption due to lack of clarity in the manual. My sensors MIPI clock should be configured to output about 900Mbps on a 2 lane configuration.Regarding CSI, I've also noticed that both the DLD bit in CSI_PFCR is set to 1 in the MX generated code though the reference manual states it should be set to 0. Noticed a similar discrepancy with the CSI_PCR PWRDOWN bit which is set to 1 by the generated code. The manual states that 1 is "Power

Hi all,I am trying to read/write the EEPROM -24FC64 connected with stm32g474ceux microcontroller. The slave device address is 0x57 (1010 (control code)  + 111 (chip select bus) = 0x57).  I2c bus speed is 100KHz as set  during stm32CubeMX configuration.My C code is as follows:uint8_t Data_write = 0xAA;HAL_I2C_Mem_Write(&hi2c1, (0x57 <<1), 0x00, 2, &Data_write, 1, 100);HAL_Delay(10);HAL_I2C_Mem_Read(&hi2c1, (0x57 <<1), 0x00, 2, &Data_read, 1, 100);So during the debugging, i do not see the sent data (0xaa)  at variable Data_read pointer.Can anyone suggest/guide me please what could be wrong here.? Many thanks in advance.

Hi,I am currently working with the STM32H745I-DISCO development board. Initially, I followed a reference tutorial to successfully implement a basic LED blinking application utilizing both cores—Cortex-M4 and Cortex-M7.Subsequently, I created a GUI-based project using TouchGFX Designer, which I then imported into STM32CubeIDE. The project compiled without errors; however, during the debugging phase, I encountered the following issue:Error in final launch sequence: Failed to execute MI command: load C:\\TouchGFXProjects\\MyApplication_4\\STM32CubeIDE\\CM7\\Debug\\STM32H745I_DISCO_CM7.elf Error message from debugger back end: Error finishing flash operation Failed to execute MI command: load C:\\TouchGFXProjects\\MyApplication_4\\STM32CubeIDE\\CM7\\De

Hi Dear friends, I am trying to configure H750 to transfer data between internal SRAM and external SDRAM, I got everything setup OK but with some problems (also monitor data bus with logic analyzer). So I checked with ChatGPT, surprisingly, ChatGPT said H750 (actually it said the same thing about H74x)  does not officially support memory-to-memory transfer, ChatGPR said use MDMA instead. Before I jump into MDMA, just want to make sure what ChatGPT said is true? Thanks.  

Split from this thread. Hello @mƎALLEm ,   Thanks for the updates. What is Bypass mode? Can you please provide guidance for this?   Thanks & Regards, Jignesh Karena  

Hello members, Until recently, I was using a G473. There, I ran code from the ccmram. That worked without any problems. Now I have switched to the H533. For performance reasons, I want to run the code in SRAM1 0x20000000 - 0x2001FFF. I want to keep the data in SRAM2. MEMORY { RAM (xrw) : ORIGIN = 0x20020000, LENGTH = 80K /*Ram placed SRAM2 with ECC-Check*/ FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K CCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K /*SRAM1 for code */ } For example, the function: __attribute__((section(“.ccmram”))) void EXTI0_IRQHandler(); is located in the map file at the correct address: .text.EXTI0_IRQHandler0x0000000020000300 0x28 ./Hal/Interface/Interrupts.o0x0000000020000300 EXTI0_IRQHandler The code is copied to SRAM1 in the startup file. However, when I call the function, a hard

I connected the nucleo board with the cpu using port CN6 using USB-C cable with BOOT0 and BOOT1 set as L and jumper jp2 is set on STLK everything as specified in getting started module in um3300-discovery-kit-with-stm32n657x0-mcu-stmicroelectronics%20(3).pdf. After this I installed tools stm32cubemx,stm32cuben6-v1-2-0 and stsw-link009. After this I used STM32CubeMX to create a new project with the following specifications: commercial part number STM32N657X0H3Q ,secure domain and PO1 as GPIO_Output in section Pinout & Configuration .In project manager I selected only Appli as project Structure with basic as Application Structure and MDK-ARM as toolchain with min version V5.32.After this I generated code and opened the project in keil uvision version 5.36. The code is building without any errors but on flashing I encounter the error Invalid ROM table. The debugger is detectable in Target. Only issue that I come accross is when I'm connecting the board using port CN6 via

Hello Team, For STM32H7S7L8H6 part we are planning to use below oscillator in our design. Request you to confirm which parts are more compatible with STM32H7S7L8H6.1) DSC6101ML3B-025.00002) DSC1101CI5-025.0000 Thanks & Regards,Jignesh Karena

I'm using a NUCLEO-H755ZI-Q board. I tried to read following address.TEMPSENSOR_CAL1_ADDR (0x1FF1E820UL)TEMPSENSOR_CAL2_ADDR (0x1FF1E840UL)But I can't. it causes HardFault interrupt.I also tried to read the area from Debugger.Debugger said Failed to execute MI command:-data-evaluate-expression *((short*)0x1FF1E820)Error message from debugger back end:Cannot access memory at address 0x1ff1e820 But it is possible from Cortex-M7. I tried other System Memory area, But I can't.I think Cortex-M4 cannot access System memory area without special sequence.How do I access the area form Cortex-M4? Someone, please help me.

Hi,  I'm using STM32L0 MCU, My system uses MSI as the main system clock, but my USART is to use HSI to be able to wake up from stop mode. My system will enter stop mode for power saving. I am confused about the settings, before enter stop mode, we have to set system clock after STOP mode using HAL API: __HAL_RCC_WAKEUPSTOP_CLK_CONFIG(RCC_STOP_WAKEUPCLOCK_MSI); // Set system clock as MSI after stop __HAL_RCC_WAKEUPSTOP_CLK_CONFIG(RCC_STOP_WAKEUPCLOCK_HSI); // Set system clock as HSI after stop so that USART able to wake up the MCU   void PreSleepProcessing(uint32_t *ulExpectedIdleTime) { *ulExpectedIdleTime = 0; // WFI is called within next function #ifdef TEST_LP_MODE HAL_GPIO_WritePin(GPIOB, GPIO_PIN_3, 0); #endif if (g_diableStopModeFlags == 0) { while(__HAL_UART_GET_FLAG(&huart1, USART_ISR_BUSY) == SET); /

Hello, I'm working with a STM32G0B0CE part.  I believe that the TRM definitions for RCC_CCIPR2->USBSEL are incorrect.I was having trouble with USB, seemingly related to clock selection.  I noticed in the LL HAL headers the following:#define LL_RCC_USB_CLKSOURCE_HSE RCC_CCIPR2_USBSEL_0 /*!< PLL clock used as USB clock source */ #define LL_RCC_USB_CLKSOURCE_PLL RCC_CCIPR2_USBSEL_1 /*!< PLL clock used as USB clock source */#define RCC_CCIPR2_USBSEL_Pos (12U) #define RCC_CCIPR2_USBSEL_Msk (0x3UL << RCC_CCIPR2_USBSEL_Pos) /*!< 0x00003000 */ #define RCC_CCIPR2_USBSEL RCC_CCIPR2_USBSEL_Msk #define RCC_CCIPR2_USBSEL_0 (0x1UL << RCC_CCIPR2_USBSEL_Pos) /*!< 0x00001000 */ #define RCC_CCIPR2_USBSEL_1 (0x2UL << RCC_CCIPR2_USBSEL_Pos) /*!< 0x00002000 */ This seems to indicate that USBSEL should be

I am developing software on the Nucleo-L433RC-P board but have a strange situation when debugging.The first time I debug, the software does not run and I get the following error... Break at address "0x1fff2ce8" with no debug information available, or outside of program code. Break at address "0x1fff2cd6" with no debug information available, or outside of program code. As shown in the screenshot below...However, the second