STM32G4: trigger one DMA stream by both capture & overflow/update timer events? I am trying to capture timestamp values using STM32G474RE.
Requirement
I need to route:
COMP1 output -> Timer input capture
COMP2 output -> Timer input capture
On each comparator edge, the timer should capture the current counter value and transfer it to RAM using DMA.
In addition to edge captures, I also want the same timestamp stream/buffer to receive an entry whenever the timer overflows/updates.
Example desired stream: (Consider its a 8bit Timer)
240, 244, 248, 254, overflow_marker_or_last_CCR, 6, 8, 12
or during no-edge periods:
200, 200, 200, 200
if the update DMA reads the last captured CCRx value.
STM32F072 behavior
On STM32F072, I was able to achieve similar behavior by enabling both DMA request bits:
TIMx->DIER |= TIM_DIER_CC1DE | TIM_DIER_UDE;
This allowed the DMA stream to be triggered by both:
capture/compare event
update/overflow event
Issue on STM32G474RE
On STM32G474RE, DMA routing goes through DMAMUX. For example:
TIM2_CH1 has one DMAMUX request
