STM32 MCUs

Hello,   Is there a setting in MX2 to enable/disable timer freezing during debugging? If not, what HAL APIs can be used for this purpose?   Thank you, Gil

Hi All!I'm starting with a project with STM32H573 + STiRoT + Trustzone + Crypto + FreeRTOS + DA.My preference is to do development and debugging in Visual Studio Code instead of the Eclipse based IDE.I got to the point that I can build a secure/encrypted application (still without FREERTOS at this point) in VS Code and was able to provision my board.However, I can't really find anything on debugging in VS Code with Debug Authorization.I did find the tutorial on CLI DA for provisioning and regression (https://community.st.com/t5/stm32-mcus/implementing-debug-authentication-on-stm32h5-using-cli-tools/ta-p/622308) but not for actual debugging in VS Code. Maybe I've overlooked this on the forum and/or application notes. I'm hoping that someone can give me a push in the right direction. Or is this not officially supported in VS Code yet and am I bound to Eclipse IDE at this point in time?With kind regards,Martijn

I am currently considering the EVALSTGAP4S evaluation board for a laboratory prototype, and I would like to ask a few technical questions about its possible use in a motor-drive application.My goal is to build a 7-level cascaded H-bridge (CHB) multilevel inverter for motor driving. Since the EVALSTGAP4S includes isolated gate drivers, I am wondering whether it can be used as a building block for a CHB inverter cell.I would like to ask the following:What is the practical current capability of the EVALSTGAP4S board?I would especially like to know the recommended continuous current range, and whether it depends on thermal conditions, switching frequency, or cooling method.Would this board be suitable for use in a 7-level cascaded H-bridge multilevel inverter for motor-drive applications?If not, what would be the main limitations or concerns?Since the board has isolated gate drivers, can multiple boards be used in a cascaded configuration with floating DC sources?If there are any important

Hi All,I have an issue with STM32CubeMX 6.17.0 (Windows 11 + Visual Studio Code)I want to start a STiRoT Full secure project (with DA and encryption) for STM32H573 with FREERTOS.But when I add the freertos software pack, I don't get any configuration options.Open STM32CubeMXStart My project from MCUSelect STM32H573IIK3Q (same as STM32H573I-DK)Enable ICACHE and MPU -> YesWith TrustZoneSoftware packs -> Select Component -> Cortex-M33 Secure -> X-CUBE-FREERTOS 1.5.0 -> CMSIS RTOS2 11.2.0 -> Core : TZ_Secure (I can't select Heap???)No configuration is shownIf I add FREERTOS to non-secure I am able to open configuration optionsI have added my IOC file.Can someone tell me what I'm doing wrong?Thanks!With kind regards,Marty

NUCLEO-F767ZI I'm trying to use the LwIP middleware which I have enabled in MX. First I'm trying to check if an ethernet cable is attached or not. I have setup UART3 to use printf (which works as expected) I've set the callback in lwip.c to print when the cable is removed or plugged in or so I thought but I get no message when I connect or disconnect the cable. The LEDs on the socket light up when the cable is connected, so the board at some level does see the cable. What am I missing here? EDIT:: LWIP_NETIF_LINK_CALLBACK was enabled in MX // In main.c MX_LWIP_Init(); /* USER CODE BEGIN WHILE */ while (1) { MX_LWIP_Process(); /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ } /* USER CODE END 3 */ // In lwip.c the callback function that is registered in MX_LWIP_Init() static void ethernet_link_status_updated(struct netif *netif) { if (netif_is_up(netif)) { /* USER CODE BEGIN 5 */ printf("Cable connected\r\n"); /* USER CODE END 5 */ } else /* netif is down */ { /* USER C

Hello, I have a simple CubeMX project with the STM32N6 MCU, and I cannot seem to be able to uncheck the FREERTOS option from the FSBL to move it to the Application.  Is there something I am doing wrong? Thank you 

Hello STM team,   We are working to interface the  NUCLEO-U5A5ZJ-Q and nRF7002-DK using QSPI. We are using vanillas zephyr. We are able to built the code for SPI. But can not be able to built for QSPI. It will be very helpful if you provide a proper support to interface this.

Hello,   I configured a timer in STM32CubeMX2 to use 2 channels (HAL_TIM_CHANNEL_1 and HAL_TIM_CHANNEL_3). After the mx_system_init() I use the following code: hal_tim_handle_t *htim5 = mx_tim5_gethandle(); if (HAL_TIM_OC_StartChannel(htim5, HAL_TIM_CHANNEL_1) != HAL_OK) { return (-1); } if (HAL_TIM_OC_StartChannel(htim5, HAL_TIM_CHANNEL_3) != HAL_OK) { return (-1); } if (HAL_TIM_Start(htim5) != HAL_OK) { return (-1); }  The first channel starts as expected, but when I attempt to start the second channel the code causes an assert in HAL_TIM_OC_StartChannel: /* Check and update the channel state */ ASSERT_DBG_STATE(htim->channel_states[channel], HAL_TIM_OC_CHANNEL_STATE_IDLE);   Do I need to do anything different?   Regards, -Gil

Dear Community, dear STMicro, I'm trying to encrypt data on an STM32WL55JC device using the STM32CubeExpansion_Crypto_V4.5.0 library and then using Python on the PC to decrypt it again.I've taken the example code for RSA encryption from the librarySTM32CubeExpansion_Crypto_V4.5.0/Projects/NUCLEO-WL55JC/Applications/RSA/PKCS1v2.2_EncryptDecryptand adapted it.I've created an RSA 2048 bit key on my PC using this code:private_key = rsa.generate_private_key( public_exponent=65537, key_size=2048) pem = public_key.public_numbers() public_exponent = ["0x%02s" % e[i:i+2] for i in range(0, len(e), 2)] n = "%X" % pem.n n = "0" + n if len(n) % 2 == 1 else n modulus = ["0x%02s" % n[i:i+2] for i in range(0, len(n), 2)] f = open("pub.c", "w") f.write("public_exponent[] = {%s}\n" % ", ".join("%s" % s for s in public_exponent)) f.write("modulus[] = {%s}" % ", ".join("%s" % s for s in modulus)) f.close() From this code I get something like thispublic_exponent[] = {0x01, 0x00, 0x01} modulus[]

i have a tool base website that made by Claude/cursor ai. but now the issue is the color scheming is not very good it looks that it made by vibe coding. suggest some good color scheming and layout that make difference and looks more professional and human made CPU Bottleneck

The entry for address 0x1FFF7838 in Table 17 ( Organization of option bytes) shows FLASH_PCROP1ASR as the "Corresponding option register" - it should be FLASH_PCROP2ASR.

  Trying to Interface ADS1293 with STM32U5 for 3-Lead ECG – Need Help with Lead II DataHi STM32 Community :waving_hand:,We’re trying to build a 3-lead ECG signal acquisition setup using the ADS1293 analog front-end connected via SPI to an STM32U5G9ZJT6Q microcontroller. The goal is to capture and plot Lead I, Lead II, and derive Lead III using TouchGFX. What’s Going Well:We are able to receive and plot clean ECG data for Lead I (RA - LA) using CH1 of the ADS1293.SPI communication is stable, and the plotting is handled through TouchGFX without lag.Sampling is working at 500–1000 Hz using a DRDY-based interrupt routine.What We’re Struggling With:When we try to configure CH2 for Lead II (RA - LL), the data appears noisy, flat, or unstable.We’re using the same initialization and acquisition process for CH2 as we did for CH1, but the result is not usable.For Lead III, we are trying to derive it in software using:Lead III=Lead II−Lead I\text{Lead III} = \text{Le

hello ST Community,There's an STM32 board in a USB pen drive format with a small flash memory capacity and only a few pins (3-5 pins) for UART serial communication. On this STM32 board, inside the USB pen drive, I can program the dedicated software for serial communication.If it exists, can you tell me the model and serial number? I can't find it online.Thanks for the information.

Hello,   I am working with STM32WLE5CC and using the LSCO output (configured via HAL_RCCEx_EnableLSCO(RCC_LSCOSOURCE_LSI), source = LSI) to observe the low‑speed clock externally.   In my application: LSI is used as the RTC clock source RTC is used as the wake‑up source from Stop2 mode RTC is configured in binary‑only mode AsynchPrediv = 30 Wake‑up period = 5 seconds   According to RM0461: “The clock on LSCO is available in Run, Stop, Standby and Shutdown modes.” “In Stop 2 mode, all I/O pins keep the same state as in the Run mode.”   This observation is independent of RF RX/TX activity and refers only to the Run ↔ Stop2 transition.   However, on hardware I observe the following behavior: When transitioning from Run → Stop2, the LSCO pin stops toggling for a short time (~104 µs), then resumes. When transitioning from Stop2 → Run, the LSCO pin stops toggling for a longer time (~530 µs) before toggling again. This occurs even though: LSCO is enabled LSI

Hi all.I wish disable auto PAD disable CRC append.  Send packet use low_level_output(), before call HAL_ETH_Transmit_IT()I set TxConfig.ChecksumCtrl = ETH_CHECKSUM_DISABLE; TxConfig.CRCPadCtrl = ETH_CRC_PAD_DISABLE;but packet allways pad to 60byte,if use TxConfig.CRCPadCtrl = ETH_CRC_PAD_DISABLE;, no packet outputif use TxConfig.CRCPadCtrl = ETH_CRC_INSERT;  output fine but have 4byte crcr append.How to do , NO-PAD NO-CRC send packet?

I'm trying to interface with a W25N NAND flash chip on an STM32H7, over QSPI. I've only got consistent output out of the reads, and even then, I notice the system hangs forever and can't accept anymore input after a read. Everything else will hang immediately, even a print statement to the terminal at the top of the function won't appear, and the whole system hangs.   From some similar issues I found online, I thought it would be a timing issue, and so I tried to implement a status register check. That's my first function in my excerpt below. However, this function couldn't even run alone without again hanging the system (meaning something else is causing the resets, program, clear, and even status check to hang). What else could be the issue that stops everything from running?   Any advice much appreciated. Thanks very much in advance.uint8_t W25N_status(void) { QSPI_CommandTypeDef cmd = {0}; uint8_t status; cmd.InstructionMode = QSPI_INSTRUCTION_1_LINE; cmd.AddressMod

Hardware: STEVAL-MKI109D (STM32H563ZI)CubeMX: 6.17.0CubeIDE: 2.1.0Connection: USB-C directly to STM32H563 USB OTG (no ST-LINK chip)PROBLEM:I need USB CDC Virtual COM Port in a bare-metal application(no RTOS). CubeMX 6.17.0 for STM32H563 only offers:- USBX (requires ThreadX)- ThreadX- FileX- LevelXClassic USB_Device middleware (usbd_cdc_if.h / CDC_Transmit_FS)is NOT available for STM32H5 series in CubeMX 6.17.0.USBX requires ThreadX RTOS. Without ThreadX running,MX_USBX_Init() causes the board to crash silently —after DFU flash the board is completely invisible on USB(no lsusb entry, no /dev/ttyACM*).QUESTIONS:1. How do I implement USB CDC on STM32H563 WITHOUT ThreadX?2. Is there a way to enable classic USB_Device stack for STM32H5in CubeMX 6.17.0?3. Is there a bare-metal USBX CDC example that does NOT requireThreadX for STM32H5?4. Can I manually add usbd_cdc_if.c and USB Device library filesto an STM32H5 project without CubeMX support?I have a working SPI sensor application (ISM330DHCX

Hi everyone, I am trying to read pulses of a rotary incremental encoder npn  on the screen connected to a Jetson sbc, through SPI connection with a STM32 NUCLEO-G474RE. On CubeMx i already modified pins, generated code and flashed on stm32. Once i run the python code on Jetson, no pulses are seen on the monitor.  Do you have any suggestion? Thank you in advance. Enrico

While I was experimenting with the 'L476 Disco, the RM wording goes across multiple families, so it may be relevant to most/all of them. In particular, for Shutdown mode (which is supposedly the lowest-VDD-consumption mode), the RM says: What does "switch to Backup domain is not supported" mean, exactly (assuming VDD and VBAT have separate sources)?  as soon as Shutdown mode is entered, RTC (backup domain) is switched to VBAT even if VDD is present, potentially draining the VBAT source (battery, capacitor) in Shutdown, while VDD is present, RTC is powered from VDD; but when VDD is removed, RTC is *not* switched to VBAT, resulting in backup-domain reset and/or RTC corruption in Shutdown, while VDD is present, RTC is powered from VDD; but when VDD is removed, most of the time the switch flips to VBAT as expected, but this is not reliable and sometimes RTC corruption occurs in Shutdown, it's unpredictible, what is the backup-domain switch state, even while VDD is present These are

Hello, is it possible to boot FSBL and load application from SD card upon powerup, bypassing onboard flash?  I didn't see any clear guides on this procedure.Thank you

In testing the LoRaWAN_End_Node_LBM application supplied with STM32CubeWL-1.5.0 release I found that the output power is substantially lower than the same test setup with the LoRaWAN_End_Node application supplied with STM32CubeWL-1.4.0.  This testing was conducted only using the US915 region setting.First I found that the EIRP was being defined as 16 dBm in Middlewares/Third_Party/LoRaWAN/smtc_modem_core/lr1mac/src/smtc_real/src/region_us_915_defs.h when it should be 24 dBm.#if defined( LR11XX ) || defined( SX1262 ) || defined( SX1268 ) // region is 30 dBm but radio is 22 dBm ERP (+2 to EIRP) #define TX_POWER_EIRP_US_915 (24) // define in dbm #else // region is 30 dBm but radio is 14 dBm ERP (+2 to EIRP) #define TX_POWER_EIRP_US_915 (16) // define in dbm // TODO must be checked, SX126x dependent for the max power #endifSince the project compiles with the preprocessor symbol -DSX126X the #if condition fails and the maximum transmit power is capped at 14 dBm ERP rather tha

I’m designing a board using the STM32U083MCT6TR, and my system supply voltage is VDD = 1.8 V.The design does not use USB at all. The datasheet specifies that VDDUSB normally requires 3.0–3.6 V for USB operation, but it’s not fully clear what the correct connection is when USB functionality is not needed. My question:What is the recommended way to handle the VDDUSB pin when USB is unused and the MCU is powered at 1.8 V? Should VDDUSB be tied to VDD (1.8 V)? Should it be left unconnected? Or is another configuration required? If anyone has experience with the STM32U0 series or clarification from ST, I’d appreciate the guidance. Thanks, -Tal

Hi everyone,I’m currently working on a project involving LR-FHSS and I’d like to know whether there are STM32-compatible end devices and gateways that already integrate LR-FHSS-capable radio chips.From what I’ve found so far:End Devices (sensor/node): They must use a chip from the SX126x family.Gateways: They need to be based on the SX1302 or SX1303.Before I start designing custom hardware, I’d like to confirm whether there are existing commercial end devices or gateways that already include these chips with LR-FHSS support.If anyone has experience with this or can recommend specific hardware, I would really appreciate it.Thanks!

This is probably an old hat to most of you here but I'm facing this problem momentarily:Using an STM32F103CBT6 (Blue Pill) where GPIOB Port is used already with the following PB3 - SPI1_SCKPB5 - SP1_MOSIPB6 - Some Interface Function (OUTPUT)PB7 - Some Interface Function (OUTPUT)   I want to use PB0, PB1, PB4, PB8, PB12,PB13,PB14,PB15 for a keyboard matrix scan and outputa running pattern to these pins. Writing the bits should be nondestructive what the remaining bits is concerned. At the back of my mind I recall something like BSRR, but could someone help me to get on the right track?I'm using HAL in this app (under STM32CubeIDE).

Hi, I am working with the SBSFU_Boot on the STM32U5A9 chip. After the SBSFU_Loader has written the update image into internal memory, a reset happens in order for the SBSFU_Boot to write the image to be booted. When performing the update, it ends up in a process where it has to do some encryption. The SAES engine is initialized successfully, and then AES_Encrypt is called. This keeps on failing because a read error is reported in the SAES->SR reports a read error upon enabling the SAES peripheral. It should be noted that the initialization and encryption sequence is strictly followed per instructions in RM0456 Rev 6 sections 50.4.4 (Initialization of SAES) and 50.4.8 (ECB/CBC encryption sequence) respectively. What am I missing?