STM32 MCUs Products

Hi,  I am working in STM32G491, currently working on MCU firmware upgrade part. I have a doubt regarding the output pins. Currently we have SET 2 GPIOs to high. That is power enable for another device say A. From another external device B, it is controlling bootpin and nrst pin.  My doubt is if I make mcu to bootmode does that GPIO output value changes? The situatuion is during device running, I make 2 gpio high. From another device mcu got entered to bootmode. Does the output pin change the high value?

Hello. I'm trying to configure the STM32C011J4M6 to output SPI in Transmit Only Master mode. However, as soon as I turn on SPI in STM32CubeIDE and program it, the uC stops behaving properly. I can't transmit any data and the clock pin stays high with periodic spikes down to ground. My best guess is that this has something to do with the clock pin being assigned to the reset pin.I'm able to program it to toggle GPIO separately, but as soon as I try to change the reset pin to a GPIO, all the GPIO stop toggling and the reset pin does the high with spikes thing. That seems to point to this being a "reassign the reset pin" issue than a SPI issue.Is CubeMX just not disabling the reset pin properly? I don't have anything connected to the uC except the programming SWD clock and data lines, as well as the reset line connected to the programmer.I've never tried to repurpose the reset pin before, but I can't imagine ST would add an unusable SPI peripheral.The only changes I've made to main.c

I am using two  NUCLEO-U385RG-Q boards for I3C communication—one as the Controller (Master) and the other as the Target (Slave). When the Controller’s RX length exceeds the Target’s TX length, after the first call to HAL_I3C_Ctrl_Receive_IT the Controller appears to enter an abnormal state; on the second call to HAL_I3C_Ctrl_Receive_IT, it hangs and an abnormal waveform is observed. After the first call, is there a way to restore the Controller to a normal state? Regarding Target-controlled TX length, please refer to I3C Specification, Section 5.1.2.3.4, which states:In I2C, Read from Target has the issue that only the Controller ends the Read, so the Target has no ability to control the amount of data it returns. In I3C SDR, by contrast, the Target controls the number of data Words it returns; but it also allows the I3C Controller to abort the Read prematurely when necessary. Master Rx = 3, Slave Tx = 2 (First & second calls) Master Rx = 2, Slave Tx = 2 (F

Setup DescriptionMCU: STM32G070REPeripherals:ADC1 sampling 11 channels (IN0–IN8, IN17, IN18).DMA1 Channel1 configured circular, PERIPH→MEMORY, increment on memory.Timer 15 used to generate a 3 ms integration window (for TPIC8101 knock sensor).CC1 = start of window (INT pin LOW).CC2 = end of window (INT pin HIGH) and also used as TRGO (OC2REF rising edge) to trigger ADC conversions.(ADC should only come into picture when INT pin goes high)DMA buffer: uint16_t adc_raw_buffer[NUM_CHANNELS] where NUM_CHANNELS = 11.What WorksTIM15 interrupts (CC1 and CC2) are firing as expected.GPIO pin toggles correctly at CC1 and CC2.TRGO is configured as LL_TIM_TRGO_OC2REF.What Does Not WorkDMA1_Channel1_IRQHandler never fires.The DMA buffer (adc_raw_buffer[]) remains unchanged.It looks like the ADC never actually starts conversions on TRGO.                                              &nbsp

My timer setup in input capture mode. The ICPrescaler value is set to TIM_ICPSC_DIV2, meaning a capture event will occur on the falling edge of every second pulse.  I need to handle an edge case where I need to "reset" the whole input capture system. If I need to handle a reset in-between the first and second triggers, then the internal prescaler counter will be at 1 when I reset/reconfigure, and then the very next input edge will trigger a capture instead of waiting for the full prescaler count of 2  In order to handle this edge case I need a way to "reset" the internal prescaler counter, however I don't think there is a HAL function to do this.

I am using the STM32U575 on a custom board and see that AN2606 indicates PG10 becomes a SPI MISO output in bootloader mode. I would like to connect this same SPI port to another device with the STM32 in master mode for the user application. In order to avoid contention on this signal, I am hoping that in bootloader mode the SPI MISO output is tri-stated if the associated NSS is negated (high). I have seen a couple of posts that touch on this question but I have not been able to confirm the behavior. For example: https://community.st.com/t5/stm32-mcus-products/spi-pin-states-during-bootloader-detection-phase/m-p/696205 Another post for a different part mentions that the SPI port can be setup to support multiple slaves by tri-stating MISO when not selected, but I don't know if this is the default behavior in bootloader mode for this device. Thank you for any feedback.   -Jason

As the title says, the STM32G47 PA9 pin appears to be set high in boot mode opposed to pulled high though a resistor which is states in AN2606. This is becoming a problem because it introduces negative behaviors in our design when we try to reprogram. Is this a known behavior documented elsewhere?I have gotten pretty frustrated when migrating from the STMF3 family to the STMG4 since there are many more pins being pulled or set in one direction or another during boot mode. Is there any way to disable some of these hardware defined communications protocols during the boot loader mode initiated by the BOOT0 pin?

Hello guys.I designed a custom board around the STM32F411CEU6. On this board, I have a switch and a screw terminal header, both of which are intended to be used has GPIO inputs. However, with both I've had a struggle working with GPIO inputs and interrupts. Attached is my current code, with my button being located on pin PA0. I intend to use pins PA1 and PA0 as input, with PA1 attached to a mat that activates similar to a switch. What's more confusing is that my display and touch input does indeed work. In fact, even LVGL works on this microcontroller and display. It's only the GPIO interrupts and inputs that I have an issue with. I've also attached a picture of my schematic. Any help is appreciated!/* USER CODE BEGIN Header */ /** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************************************** * @attention * * Copyright (c) 2025 STMicr

I have been struggling with this chip for a few days now.  I have code up for the STM32F072, and the STM32F100 series chips, but the GPDMA in the STM32U535 is baffling me.  And no, I am not a big fan of the product notes for the GPDMA, while I've gone through them, I couldn't find much to help. Here's the challenge; the chip fails immediately with a DMA_FLAG_DTE error, with the trigger overrun flag being set in the CSR.  No idea why or where to go next after 2 days of trying to troubleshoot this.  Here is the MXCube configuration: In the code, there is a simple 8Khz WAV file stored in the "tinkles" array.  Using the standard generated code from MXCube, I have attempted to just play it out the DAC with the following calls: HAL_DAC_Start_DMA(&hdac1, DAC_CHANNEL_1, (uint32_t*)tinkles_wav, tinkles_wav_len, DAC_ALIGN_8B_R);HAL_TIM_Base_Start(&htim2);  It *is* an 8-bit array, and I am not sure if that may be part of this.  Here is the code: ex

The codebase is generated by CubeMX and now I'm facing issues during debug.debug method is SWD using ST-LINK V2.In debug mode, after resume fron HAL_Init(); , the code will crashed into system memory zone and have no debug information.Break at address "0x1fff12ca" with no debug information available, or outside of program code.the location of the address varies around 0x1fffxxxx sometimes.to be exact, the crash will happen when:Initialize the IWDGUsing Flash R/W OperationStart Timer (But not Init)In STM32G031, 0x1fff12ca is located at system memory area where it houses the factory bootloader.What confuses me is, I have another code project that has basically the same start up code at main() but it works just fine (in another STM32G031, and hardware connection is the same regarding BOOT0 pin). Tried Clean project and rebuild, restart IDE and change optimization, changing minimum heap and stack, absolutely no help whatsoever. I have not try to load

Hi, I'm seeking some advice on using a STM32U5A5 in USB device only via a USBC connection.Any previous USB "device only" designs I've worked on only required connections to D+, D- and ground to communicate. These designs have been USB2x.The U5A5 has lots of cool features regarding the USB module etc but we have assigned other features to the pins that are associated with the more the more advanced features like CCx and VBUS SENSE etc. As we plan to use the part in device only mode am I correct in assuming that reallocating the unused pins OK to do and that D+, D- and GND are the only connections required?We are using the USBC port for a communications link to a PC using CDC, and developing with the associated NUCLEO-U5A5ZJ-Q board. However our product schematic will look like the one in the attached schematic snippet.Thanks in advanceCaleb

Dear ST Support Team,I am developing a USB-based device using the STM32H755 microcontroller.In order to ensure proper identification of the device on host systems, I would like to requestthe allocation of a unique USB Product ID (PID) under STMicroelectronics’ Vendor ID (0x0483).Could you please advise me on the procedure to obtain an official PID for my project?Here are the key details about my project:- MCU used: STM32H755 Nucleo board (later migrated to custom PCB).- USB device class: Vendor Specific (WinUSB/libusb communication).- Purpose: Development and prototyping, with potential for small-scale production.- Planned distribution:  internal use only .I am aware of ST’s sublicensing policy and I would be grateful if you could guide me through thenext steps in the allocation process.Thank you in advance for your support.Best regards,Mariusz

Hi,I am using STM32H7B0Since it has only 128KB flash, I will need to use an external flash to run code. There will be a "host" mcu to control this (with BOOT0 / NRST pin control).I am wondering is it possible to use the built-in ROM bootloader (in system memory), to directly flash the incomign code to connected external flash? I found app note AN4852, suggesting its possible. But seems we need to use specific peripherals (QSPI?) to connect the external flash?I haven't dug into the details yet, since I am still in the planning stage of the project. Just want to know if its possible (or NOT), and what are the precautions (peripherals/pins designated) for this?

Hi, I'm trying to communicate two microcontrollers (STM32H503CBT6 and a NUCLEO-H503RB) via FDCAN but the STM32H503CBT6 is not sending any messages.Both have the same configuration, but the NUCLEO-H503RB can send (I have checked it with an oscilloscope).Searching for an answer I found this question on the forum, saying that the STM32U5F7 has the FDCAN disabled by hardware and I wonder if this is the case with the STM32H503CBT6 Question: https://community.st.com/t5/stm32-mcus-products/fdcan-not-working-with-stm32u5f7/td-p/720224Thanks!

Split from this thread. thanks to @Ozone @Karl Yamashita, this afternoon I have tried to extend can2.0 to canfd with my project of stm32g474vet6.  I found some strange things, I think there may be a bug of stm32g474vet6 fdcan module. I modifed the FDCAN_TxHeader to FD_Frame and datelength to 64byte. for  FDCAN_RxHeader, almost nothing to modify. then i used an app on PC to send a 64bytes CAN message,  then my code received the 64bytes message and copied to rxbuffer, the rxbuffer had 64bytes data, but FDCAN_RxHeader.datalength is 15. it is not 64.  i think this is a bug of stm32g474vet6, it received 64bytes data but FDCAN_RxHeader.datalength is 15. I have no can tool now (with used by other people), when i have the can tool, i will take screenshot to show the strange thing. hello @mƎALLEm @Saket_Om did you meet FDCAN received 64bytes but  FDCAN_RxHeader.datalength is 15? is there some configuration I miss?   Thanks a

HelloI am using NUCLEO-G474RE board to sample voltages from the the Battery management board. In the PCB board, I have opamp voltage divider to step down voltages around 24Volts to 2.5V level to be read from the STM. Please refer to the voltage divider network below. I have the divider node feeding into ADC. At node A, I am not seeing fluctuations, but at node B(Nucleo board side) I see the 400mV fluctuations. Please see the attached graphs. My setting are 96MHz clock prescaler divided by 10, sampling time is 42.5cycles, and buffer size is 4000. Grounds are connected by jumper wires with IDC connector and adc pins are connected by IDC+Jumper wires. I am not sure how this can be fixed. I tried slowing down the clock by increasing the pre-scaler number, but this didn't help. Could this be the ground bouncing case? I have been debugging this for weeks, and I have no clue what this is caused by.Thank. you very much in advance   

Hello,The target MCU is STM32L151ZETx (LQFP144), and the main clock frequency is 32 MHz.Normally, the system operates in Run mode, but I plan to use Sleep mode or Low Power Sleep mode when the supply current decreases.My question is: when entering Sleep mode or Low Power Sleep mode and then returning to Run mode, is it possible to resume execution from the exact code line (or position) where it was before entering Sleep mode, without requiring clock setup or any additional operation?Thank you.

Target MCU: STM32L151ZETx (LQFP144)Main Clock Frequency: 32 MHz When the MCU is first powered on, it takes about 41 ms to reach the while(1) loop in the main() function, based on the code shown below. For my product requirements, I would like this startup time (from power-on to reaching while(1)) to be reduced to around 16 ms. Is there any way to achieve this reduction? Any suggestions or optimization techniques would be greatly appreciated. /* Includes ------------------------------------------------------------------*/ #include "main.h" #include "adc.h" #include "dma.h" #include "rtc.h" #include "tim.h" #include "usart.h" #include "gpio.h" /* Private function prototypes -----------------------------------------------*/ void SystemClock_Config(void); int main(void) { /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* Configure the system clock */ SystemClock_Config(); /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_DMA_In

I tested the LSE CSS function on the Nucleo-L053, but I found that short-circuiting the crystal oscillator pins failed to trigger the CSS interrupt. The code configuration is as follows plz give a clue or the flow of LSECSSvoid SystemClock_Config(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; /** Configure the main internal regulator output voltage */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); /** Configure LSE Drive Capability */ HAL_PWR_EnableBkUpAccess(); __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSE; RCC_OscInitStruct.LSEState = RCC_LSE_ON; RCC_OscInitStruct.HSIState = RCC_HSI_ON; RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; RCC

The Reference Manual for L4 series (RM0394) says on page 1007:"When the LPTIM is running with an asynchronous clock, reading the LPTIM_CNT register mayreturn unreliable values. So in this case it is necessary to perform two consecutive read accesses and verify that the two returned values are identical.It should be noted that for a reliable LPTIM_CNT register read access, two consecutive read accesses must be performed and compared. A read access can be considered reliable when the values of the two consecutive read accesses are equal."1. What does "asynchronous clock" mean?2. The block diagram, Figure 337 on page 988 shows a "Synchronization" block but is vague as to what this pertains to.3. Also, what is meant by "kernel clock"?  If I am using the LSI oscillator for the clock source (CLKMUX = 0), where does this "lptim_ker_ck" come from?  How is this mapped to LSI clock?  This is confusing.4. If the LPTIM1 is being fed by LSI clock, does the caveat page 1007 still

I'm experiencing FDCAN Memory Access Failures on the STM32H503KBUX during CAN Rx. I am also experiencing intermittent CAN Rx message drops (every 1 in a 200), and I believe the two are related since no others errors are firing. I know the drops are happening on the STM32 because I can see the messages on the bus with my CAN debugger and there are no error frames. I'm struggling to understand why this Memory access error is happening and how to proceed with solving it. The only info I can find is in rm0492. However, it doesnt really say what might cause these events to happen. Other relevant info:- Using internal clock- Freertos- Using to `HAL_FDCAN_RxFifo0Callback` to read from FIFO- Config hfdcan1.Instance = FDCAN1; hfdcan1.Init.ClockDivider = FDCAN_CLOCK_DIV1; hfdcan1.Init.FrameFormat = FDCAN_FRAME_CLASSIC; hfdcan1.Init.Mode = FDCAN_MODE_NORMAL; hfdcan1.Init.AutoRetransmission = ENABLE; hfdcan1.Init.TransmitPause = ENABLE; hfdcan1.Init.ProtocolException = EN

Hello,Is it possible that STM32f207ZGT6 purchased in 2025 from an official distributor have an old silicon revisionrev_id = 0x200f?

I am having a problem reading SPI data on an STM32F407 where it always returns 0x00. I actually have this working using HAL on the same hardware, however for legacy reasons I need to get this working with SPL. This application is just sending clock signals to the slave and reading the received data. There is no activity on MOSI.I can scope the signals and see the expected traffic on the SCK and MISO so I at least know my clock transmit is working. I just can grab the correct read data. Here is my code. I feel like I'm missing something basic for SPL. Any insight would be helpful.#include "main.h" #include "stm32f4xx_spi.h" #include "stm32f4xx_usart.h" #include "config.h" #include "board_init.h" #include "gpio.h" #define TIMEOUT_TIME 1000; uint16_t SPI_TransmitReceiveByte(uint16_t data); uint16_t spiData; void main() { uint32_t loopCounter = 0; SystemInit(); init_IO(); SPI3_Init(); powerOnLED(); while (1) { loopCounter++; if (loopCounter == 10000) { spiData = SP

According to some reference it is good to have ground polygon under IC 1. Is it okay to have ground polygon under IC? 2. Does it effects heating issue?3. I saw two hole behind the IC of nucleo 144 board. What that mean? 

On my current board the STM32G030 is getting very hot.  I have even tried a board with no connections to the processor and all pins set to analog.  I have checked the power supply and it's 3.3V.  The board runs OK but I am worried about the processor temp.  I have attached a schematic of the board.  Could something internally be configured to cause this heating?