STM32 MCUs Products

Hi,I stumbled across a problem with the LSI when i realized, that my IWDG was about 20% faster than it should be.The clock is behaving very irregularly, this is more than the deviation in the datasheet. I read out the LSI from PA2 with an oscilloscope and attached the file. One division in the picture is 15.6us, so each division should be roughly one edge. You can see that some cycles are at roughly 64kHz, which of course is double the speed..To reproduce this behaviour:When connecting to power, unplug and plug the power very fast for a few times. The LSI will then enter this state and behave that way until power is unplugged and properly replugged. Software reset and even flashing new software through our Bootloader did not have any effect, only after a power reset it will work fine again.I saw this behaviour on 6 different boards so far. I am using STM32L433CCTx with a custom designed hardwa

I'm trying to use the STM32H563 HASH peripheral to speed up sha256 calculations.The examples all use HAL_HASH_Start() to write the entire message at once.However, I'd like to feed chunks of data to the peripheral. The OEMiROT mbedtls sha256_alt driver uses the same approach:STM32CubeH5/Projects/NUCLEO-H563ZI/Applications/ROT/OEMiROT_Boot/Src/sha256_alt.cHowever, I notice that this driver accumulates data in a buffer, then feeds the data chunk by chunk.The first chunk is 68 bytes in size, subsequent chunks are 64 bytes.My questions are:-do we really have to feed data in chunks? Reading the reference manual, it seems that data can be fed one 32bit word at a time?-why would the first chunk be 68 bytes instead of 64? Is this perhaps an optimalisation causing each feed (including the very first one) to start the intermediate digest calculation (because each first word of a new block will trigger the calculation)? Or is there more to

Hello i encountered this error on F072 nucleo board, it was working fine yesterday and todayit couldnt connect up to STM IDE, whats coursing this and how to overcome this issue?Error in initializing ST-LINK device. Reason: No device found on target

I need to determine if the interrupts are enabled at one point of my code but I have not been able to find any reference for the STM32G474.  It doesn't look like there is a PRIMASK register which is mentions in another post.I know how do enable and disable the global interrupts: __enable_irq() and __disable_irq(),  but I don't know how to determine if the are enabled.How can I tell if the global interrupts are enabled? 

I am trying to provide a clock to PDM microphones using the CKI1 MDF pin, and no clock is being generated. The MDF correctly generates a clock signal on MDF CKI0. The IO configuration for CKI0 and CKI1 is the same (except for the alternate function register settings). Direction and enable bits are set appropriately in the MDF CKGCR. Is it not possible to use the MDF CKI0 and CKI1 outputs simultaneously? I have verified that I am able to drive the pin outputs high and low, but I do not get any signal when I enable clock generation.I am using an STM32U5A9J-DK board with default solder bridge configuration.

The micro STM32L072kz supports the OTA (Over-The-Air) method, I would like to perform the bootloader through the main firmware, without the need to use a USB cable or bus, write a firmware that with the help of a 4G modem downloads a new firmware from the cloud, records it on bank2 and then makes the transfer without using a USB cable or any bus.

Hi,What are the Vcore volage levels for the STM32H562 as applied by the VOS configuration bits? Datasheet -VOS0-3 = [1.35, 1.20, 1.10, 1.00] VSource - VOS0-3 = [1.2, 1.1, 1.0, 0.9] V The discrepancy lies in some outdated comments I think; maybe the values in source linked above (lines 326-347) are just an artifact that needs updated Are the datasheet values in Table 20

I'm trying to use timer 8, stm32f429I, as advanced timer, to do N DMA transfers, that copies data from portD to memory and it does trigger on PC6 after triggering, an N DMA transfers should be shot I have tried, but now it triggers only DMA transfer, only one PC6 falling edge but it doesn't do N reptition If I set reptition counter to N, the trigger is not working any more  static void MX_DMA_Init(void) { /* DMA controller clock enable */ __HAL_RCC_DMA2_CLK_ENABLE(); /* DMA interrupt init */ /* DMA2_Stream7_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0); HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); } static void MX_TIM8_Init(void) { /* USER CODE BEGIN TIM8_Init 0 */ /* USER CODE END TIM8_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0};

I have TIM20 configured in reset mode with CH1 as the trigger. I want an interrupt to run if the counter reaches a certain value. I’m using CubeIDE with CH2 configured with Output Compare no Output and the pulse duration set to the desired compare value. None of the other channels are used. I haven't used output compare features before and I'm likely missing something simple.I’m not seeing the interrupt run. I can see an input square wave on my scope. If dump TIM20->CNT to the DAC I can see it count up and reset on the edges as expected. The ramp crosses the capture compare value, so I know the value is being hit, but I don't see the interrupt trigger. When using Cube Programmer to read the registers:I see TIM20-> DIER  CC2IE bit is set.I see TIM20->SR CC2IF set to 0 and all the other CCxIF bits set to 1. I clear CC2IF in the interrupt so it makes sense its clear, but why would the others be set? I start TIM20

Hello guys,I am having problems setting the correct I2C clock on the STM32G4xx in Master Mode. The example configuration from the data sheet for 400 kHz at 16 MHz f_I2CCLK generates 432 kHz (RM0440-Rev4: P1892 Table 381). I use the __LL_I2C_CONVERT_TIMINGS() function, to convert the values from Datasheet.An unchanged example from the CubeIDE also generates an incorrect frequency on my Nucleoboard. (CubeIDE version 1.15.0)By trial and error I have now managed to generate almost exactly 400 kHz. In the TIMINGR I write 0x00100716, analogfilter enabled and digitalfilter disabled. Unfortunately I cannot reproduce this number with the information in the data sheet. So I can't get through the code review.I was able to find a configuration tool for other controllers, is there such a tool for the STM32G4xx?Can someone please help me to calculate the I2C timing correctly and comprehensibly?

I use a STM32L412 on a custom board. I have a programing script for our production which calls STM32_Programmer_CLI.exe for downloading a hex file and also some parameters to program the option bytes:STM32_Programmer_CLI.exe -c port=SWD freq=24000 mode=PowerDown -d example.hex -v -ob SRAM2_PE=0 SRAM2_RST=0 BOR_LEV=1 WRP1A_STRT=0x0 WRP1A_END=0x3d RDP=0xBB -ob displ -rst -scoreEverything works fine, the option bytes are shown correctly, but at the end it says:MCU Reset   Software reset is performed Core is locked upThe device is dead. Only a power cycle helps to come out of this. Has anybody an idea, what I am doing wrong here? I already tried some different reset or run commands, but nothing helps. The device stays locked. I guess, the problem is with setting the read out protection. I tried to set the option bytes in the firmware at startup, when I set the OBL_L

At my company were are utilizing several STM2F767 and STM32L4P5 devices within a complex embedded product. Our firmware environment is fairly complex with an RTOS and a lot of peripherals activated and IRQ handling going on during operation.We wish to take advantage of the read-while-write (RWW) functionality of the dual-bank flash architecture in these devices for firmware upgrades.  Although the details of how bank swapping is different between the F767 and L4P5 devices, our general strategy of running in one bank without bus stalls while programming the other should work according to the documentation. This strategy seems to work find for the L4P5 devices, but I'm running into problems with the F767 devices. On the F767, with the firmware running entirely in bank 1, and performing a mass erase on bank 2, I'm getting bus stalls that block operation of the firmware at random times during the mass erasure.  This seems counter to the documentati

This is regarding the issue I am currently handling. I am using STM3240G evaluation board to run a Modbus server having a TCP Raw socket-based echo server interface which receives Modbus request packets, sent from ModScan32 tool.                                                                                                                                                                The request packet is received without any errors on port 502, by the Modbus server running on the evaluation board. I am building a response Modbus packet as an array of unsigned char ty

Hi all,I'd like to know if is ti possible to have multiple callback for interrupt. Beceause with HAL and CubeMX if I have multiple interrupt, I have only one function for callbackHAL_GPIO_EXTI_IRQHandlerexample in stm32f4xx_it.c :  void EXTI0_IRQHandler(void) { /* USER CODE BEGIN EXTI0_IRQn 0 */ /* USER CODE END EXTI0_IRQn 0 */ HAL_GPIO_EXTI_IRQHandler(B1_Pin); /* USER CODE BEGIN EXTI0_IRQn 1 */ /* USER CODE END EXTI0_IRQn 1 */ } /** * @brief This function handles EXTI line4 interrupt. */ void EXTI4_IRQHandler(void) { /* USER CODE BEGIN EXTI4_IRQn 0 */ /* USER CODE END EXTI4_IRQn 0 */ HAL_GPIO_EXTI_IRQHandler(RFM_INT_Pin); /* USER CODE BEGIN EXTI4_IRQn 1 */ /* USER CODE END EXTI4_IRQn 1 */ }  So if I want to have specific callback for EXTI4 there is a solution from CubeMx or not ?Maybe :

I haven’t used AI models before and I’m trying to figure out the best way to get one running via CubeAI. I can use UART I\O to a PC to generate a model, but once I port the model and run it on an STM32, how do I communicate with it? I see the UART selection in the config options…is this what it’s using for I\O with the locally run model? If so, is there another way I can feed it a data stream?

Hi,I need to use the I2S (or SAI) interface to connect a codec stereo working at 48KHz, 32bit word length and I2S connection; when I configure the multimedia I can select the SAI interface (SAI1 or SAI4) or one of the I2S interface available.Which are the differences between them ? (I can configure the SAI as a I2S...)Another question is:I would like to use the DMA for the data transfers, for example using the I2S and the following HAL function: HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, const uint16_t *pTxData, uint16_t *pRxData,uint16_t Size) What I need to understand is: - in what way the function works, for example in

hi,i have a custom board with stm32h747xih6. i am trying to boot the device from usart1 on pins PA9/PA10 with no success. booting from usart1 on pins PB14/PB15 is working fine but requires new layout. jtag works fine too.when trying boot from PA9/PA10, pin PB15 was tied high/floating (tried both ways), still no success.i have recreated this problem on the stm32h474-disco kit with the same results.is it possible to boot from pins PA9/PA10, or is there a problem with this IC?ragards,pavel

Hi, I was trying to have microSD logging with F439 Nucleo. I can't see example with mentioned board. Please let me know:1. example for mentioned board to log data in microSD2. I tried configuring SD-4 bit, but couldn't identify the pins intialized in generated code (in MX pins used were visible)3. Tried importing F413 Nucleo e.g., but couldn't identify pins configured and wasn't able to change MCU to F439.Please guide.

Hello good day,I am using the STM32H755 Nucleo board. In the UART module, how are the FIFOs managed? According to the datasheet, there is one TX FIFO and one RX FIFO.What is the actual depth of these FIFO?

we are using UFBGA 132 for BLDC motor control with HSI clock to reduce the power consumption, we have been trying out with HSE clock by enabling PD10 to high, hereby, if we try to debug it get struck in the error handler function and the status of the clock was timeout. Anyone.

Hello,I have a project on STM32H750 where the code runs from external qspi flash in memory mapped mode. I need to write the flash occasionally and for that purpose I have some functions in RAM which disable interrupts, disable caching, abort memory mapped mode, do the actual write and then reenable all again.The described method is working well for me until now when I need DMA for my UART transfers. I found that the DMA somehow collides with my flash writing ending in hardfault.I don't know why but I suppose that I have to pause the DMA during the flash write process (IRQs disabled?). Can anyone give me an advice what's the correct way to do that? I think I remember I already read something on this topic. some appnote or forum thread, but I cannot find it anymore.best regardsJan

Hi ,I need to use MBED TLS and TCP in F429ZI board. I didn't see any example codes for the same . Can anyone Please share the example code.

Hi there,I am verifying the USB DFU bootloader in STM32F429BI.I can normally enter the bootloader and connect my MCU using stm32CubeProg.I can succeed in the program flash when I check the "Full Chip erase" option, otherwise, it will fail sometimes(see the LOG in the attachment)!But if "Full Chip erase", it needs a bit long time. Can I erase the sector when needed only?One more, each time I flash the program, I must reset the MCU by hand, can I set the MCU to auto-reset after download?Thanks for your help. My code as below:#define BOOTLOADER_ADDRESS (0x1FFF00

Hello, I have a question regarding the subject.Thank you always for your great answers. They have been very helpful :grinning_face:[Reproduction Steps]1. In CubeProgrammer, select the following External Loader:MT25TL01G_STM32H750B-DISCO.stldr> C:\Program Files\STMicroelectronics\STM32Cube\STM32CubeProgrammer\bin\ExternalLoader> The Page Size is 0x1000, but according to the Datasheet, I believe the correct value should be 0x100.2. In the Erasing & Programming menu, select Full chip erase.3. In the Erasing & Programming menu, select

Hi,I have two batch of boards with STM32F437 controllers.Batch1: It takes the controller 1.2seconds to come upBatch2: It takes the controller 200msec to come upBoth the hardware and the firmware are same.In the Batch1, when the power up is done it takes 1.2second, but when I press hard-reset switch it takes only 200ms to come up. But in Batch2, it takes 200ms with power cycle or with hard reset.By toggling a gpio pin for execution of every function, we got to the point where the delay is happening. It was in the image_validation() function in the bootloader code. Here the function does a CRC check using a while loop, that is taking 970ms in batch1 boards and 120ms in batch2 board. But how can a purely software operation causes this delay?! Apart from the bootup speed, all the other functionality is working as intended.We have already thoroughly analyzed the BOM, there to no difference that was seen.The only