STM32 MCUs Products

Hi everybody, Actually I start a new project with a ST7567 driver for LCD 128x64. I have create my project with CubeIDE . CubeIDE generate my code in the main.c  like this :    /* Private variables ---------------------------------------------------------*/ RTC_HandleTypeDef hrtc; SPI_HandleTypeDef hspi1; /* USER CODE BEGIN PV */ /* USER CODE END PV */ /* Private function prototypes -----------------------------------------------*/ void SystemClock_Config(void); static void MX_GPIO_Init(void); static void MX_RTC_Init(void); static void MX_SPI1_Init(void); /* USER CODE BEGIN PFP */ /* USER CODE END PFP */     It's ok . Now to drive my screen I would like to create files like st7567_driver.h and a st7567_driver.c f

HI!I am trying to program a custom STM32F446 Board using the SWD connections on the board. When trying to flash the custom board I receive the following error on OpenOcd:   xPack Open On-Chip Debugger 0.12.0+dev-01312-g18281b0c4-dirty (2023-09-04-22:32) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'. Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD Info : Listening on port 6666 for tcl connections Info : Listening on port 4444 for telnet connections Info : clock speed 2000 kHz Info : STLINK V3J13M4B5S1 (API v3) VID:PID 0483:374F Info : Target voltage: 0.003198 Error: target voltage may be too low for reliable debugging Error: init mode failed (una

Hi,I started working on STM32C011J4.Systick, PWM, ADC, GPIO works just fine. Set pin4 to NRST_MODE 2 via STM32CubeProgrammer (v2.15.0) as GPIO. MCU gets stuck at reset if pin4 is low at power on reset. After applying 1.4V or higher to it momentarily (even leaving it floating), MCU starts running and pin4 acts as GPIO, no reset functionality until next power cycle.Any thoughts?Thanks,Tim 

Hi supporter,I'm developing STM32H573I-DK and trying HAL_ETH_ReadPHYRegister to check link status. But this API seems be changed.Previous prototype is:HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYReg, uint32_t *RegValue)But now is:HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg,uint32_t *pRegValue)I have no idea what PHYAddr is. And PHY_BSR is also not defined in STM32H5. So, I don't know how to fill PHYReg. Is there any example? I've referenced to GitHub - STMicroelectronics/STM32CubeH5.But there are no examples about this API. T

I'm using the HAL drivers to configure ADC1 Channel 3 as Differential and Channel 4 as Single Ended.According to the reference manual (Figure 143) when ADC1 Channel 3 is differential, it is Channel 7 that becomes unavailable as it is used as INN3.  This is further supported by the STM32CubeIDE which grays out Channel 7 when Channel 3 is made differential.However, when the sample times registers are updated for the differential channels it is SMPR1 (SMP3 and SMP4) that are updated.When Channel 4 sample time is configured SMPR1 (SMP4) gets overwritten. In stm32h7xx_hal_adc.c (HAL_ADC_ConfigChannel) the sample times are updated for the channel:LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfig->Channel, sConfig->SamplingTime);And if the channel is differential sets the sample time of the associated channel: LL_ADC_SetChannelSamplingTime(hadc->Instance,

Hi, I'm working on a project for wildlife surveying, the project details are that we need to have a camera surveying an area where it will capture an image every 10s, then store data on an SD card. The system will be running for 2 weeks, and idle when not capturing images, we will be using solar and LiPo batteries to power system. Would an STM32U5 series MCU be appropriate for this system? The low power specifications are really appealing for this application, but I would like to know if it is suitable or if there is another MCU with more appropriate specifications for this project. If anyone can provide any insight it would be much appreciated. Regards, 

I want to output a static DC value from an STM32G473 DAC, but I’m seeing the output value has a noise tone on it that changes amplitude and frequency depending on various other settings. The behavior reproduces with all other peripherals disabled.  Here are observations and questions: I’m using VREFBUF in internal reference mode. Setting the DAC (1CH2,2CH1,2CH2) output to max makes the waveform bottom sit just below the VREFBUF value, and the peak waveform output goes above the VREFBUF value. This should not be possible, but its what I’m measuring. What could I check on to figure this out? With the output buffer enabled, the noise amplitude is a bit less than 1v peak to peak. If I remove the output buffer, it drops to less than 0.1v. The DAC outputs directly to a scope probe, so I don’t understand why it would behave this way. Of the three internal VREFBUF settings, the lowest one produces the highest amplitude noise tone

We have a design based on the STM32G0B1CET6 MCU.Recently we noticed some failing parts after power on/off testing. Symptoms: software is no longer running and the SWD port is not responding. We sent the broken parts to ST for analysis. The report (C241043257) showed that the FLASH status register has bit 15 (OPTVERR) set. This indicates a mismatch on option byte loading, which can be caused by a reset or glitch during the option byte programming phase.After analyzing our code, we found that at each startup the firmware writes 0xBB to the RDP option byte.We are quite sure this caused the issue, but what we would like to have confirmed is:If 0xBB is written to the RDP option byte, while is already set to 0xBB – will that still make the chip vulnerable to a reset or instable power supply? A related question:At the end of a firmware update, we do a bank swap, which requires writing to an option byte. That will also introduce a brief

We have a custom board prototype with a STM32H730VBT6 (LQFP100 package) and a SPI NOR flash memory.Sadly, this not connected to the OCTOSPIM_P1 port, but to the SPI1_NSS, SPI1_SCK, SPI1_MISO, SPI1_MISO (PA4, PA5, PA6, PB5) port (so, ony 2 data lines are connected, classic SPI).Now, our application will not fit into internal flash (nor into RAM), so we are captive to use external memory for our program. How can we solve it, except make a new board? Some questions more in detail:1. Can SPI1 be mapped somehow to OCTOSPI1?2. Is it (physically or software-wise) possible at all to use that SPI1 connected chip as memory?    I'd probably would have to reprogram the whole memory protocol (command, address, alternate bytes and data phase...)?3. What features are possible: DTR? Dual-line SPI? Memory-mapped mode?    (I think, at least the latter is impossible, if the answer to 1. is no.)4. Is it poss

 Hello, I'm new to working with STM32 microcontrollers and coding in C. I'm trying to send data in hexadecimal format using the FDCAN bus. However, when I check my code during debugging, I notice that the transmitted data looks different from what I expected. The same thing seems to happen with the received data. Can you offer any advice or help on how to fix this? 

I am used to find the CMSIS files (especially stm32f10x.h) in the same ZIP file as the STM32F10x standard peripheral library.In my legacy project, someone used the SPL V2.0.1 together with a stm32f10x.h V3.1.0.Unfortunately, the code won't compile under certain circumstances due to symbol overlap, namely duplicate definitions of types (like u32) defined in both stm32f10x.h and stm32f10x_type.h files. My interpretation is that someone has used an incompatible CMSIS and SPL version.I have checked the SPL V2.0.1 archive and it does not contain CMSIS at all. Nevertheless, I assume that CMSIS already existed in SPL V2.0.1 times.My question: Which CMSIS version is compatible with SPL V2.0.1? Where can I get this CMSIS package?

Hello all,We're having some 'strange behaviour' when interfacing our STM32F7 to a FPGA over the FMC bus.  To isolate the problems, we're looking at all the control/addr/data on the FMC bus during memory transactions.  We have a very good view into everything via the Lattice Reveal tool.   The FPGA has 16-bit data bus, and we only want to access one register/memory location at a time.  Even though we disabled data cache, we see multiple reads (separate NEx chip select assertions)We are not using the MPU (yet)We configured the FMC for 16-bit access, so it would ignore the upper halfword of the data bus.  We figured if we read only 16-bits, it would just do one read cycle (NEx assertion, OE assertion).  We see the memory controller trying to read address 0x00 and 0x01 in on read cycle, obviously 32-bits.   Our assembly code clearly shows ldrh (load data register half-word). 

Hi STM32-Community,I'm currently using an STM32L4R-MCU and was trying to set it up for standby. By using LoRa, I don't want it to keep requesting an OTAA-Command to join the network, I'm trying to use the SRAM2 Retention of my MCU in Standby-Mode. Googling and skimming through the datasheet, I only found at which adress the 64 KB SRAM are located, but how do I actually write to that memory and also read it back again?I've neither found an application note, nor an example code. I would be really glad, if someone knows more about this topic.Kind regardscrackl1ng

Hi everyone,I'm using the STM32F4 Discovery board to communicate with DC Power Supply Programmable ODA OPM Series using RS232.Now, I can send SCPI commands to device (OUTP ON, OUTP OFF, VOLT 10,...), but when I send some query commands, I can not receive any response from the devices.I tested to receive data by Hercules and it worked.Can you help me to resolve this problem.Best regards.

So,I set my DMA at circular mode ,adc at continuous mode ,but when I debug the timing to get into HAL_ADC_ConvHalfCpltCallback(),I found the buffer is already fulled,can someone tell me what's going on?

This question does not show any research effort; it is unclear or not usefulI am pretty a newbie in display control and I am struggling with my simple application. I need to calculate some numbers on my nucleo and then display them on a screen. Since this is the first time I use a display, I tried first to setup everything correctly and then working on my purpose but I am struggling with the first step.Basically, the screen does not show anything but it should show some test animations. I do not understand where the error is. Thank you so much in advance!!!Here the hardware details:Board: NUCLEO-F070RBDisplay: AFL240240A0-1.3INTM-ANO Orient Display (TFT display, 240x240, ST7789V controller)Here the connections via jumper wires (diplay -> Board):GND -> GNDVCC -> 3.3VSCL -> PA5 (SCK)SDA -> PA7 (MOSI)RST -> PC7DC -> PA9CS -> PB6

Hello, I have a problem with threads. All of them are of same priority, with osDelay(300), except the uartThread which has osDelay(1). Everything else is the same for all threads. I have allocated 20k of HEAP and in ioc file it says im using only 3.5k so that should be fine i guess. However, only one of the threads is running (I2C_temp works fine besides the uartDATA), others never even enter the for(;;) loop. Any ideas?So this is the freertos.c file where I create the tasks    /* USER CODE BEGIN Header */ /** ****************************************************************************** * File Name : freertos.c * Description : Code for freertos applications ****************************************************************************** * @attention * * Copyright (c) 2024 STMicroelectronics. * All rights reserved. * * This software is licensed under terms tha

Hello All,    I am trying to write a baremetal code for ADC, to work in Continous SCAN mode. I needed help with a few bit in internal ADC peripheral in STM32F401RE1. EOCS As per the RM, if EOCS is "1" then EOC is set for each conversion,hence suppose L=2 and ADC is sampling A0,A1. As soon as Start of conversion is given 1. A0 is sampled and loaded in DR, |->  EOC is set |->which is cleared as soon as I read DR2.A1 is sampled and loaded in DR |->EOC is set |-> which is cleared on reading DR 3. A0 is sampled and cycle continous.

Hello,What is the best way to multiplex an output pin to 12 output signals?  I currently have 1 output sourcing 3.3v through a 1k resistor which works well, but need it multiplexed to 12 identical outputs.  I see the STM32F373 has a max rating of 15mA for output pins so looking for advice on the best way to handle this.Many thanks,

Hello everybody! I have a sine-wave array, that I throw to the DAC, triggering it by TIM6. When the TIM6 interrupt routine is responsible for supplying samples - everything works fine, but when I try to use DMA nothing works. The DMA keeps spitting the USEF error. Please help! I have been trying to figure out what to do for several days already. For testing purposes, I just try to make a one 16-bit variable transfer via DMA to no avail. If anybody would please give me some advice.void DAC_init(void){ RCC->AHB3ENR |= RCC_AHB3ENR_DAC1EN; //Connecting DAC to the bus DAC1->CR &= ~(DAC_CR_EN1); //Disable the DAC before applying settings DAC1->MCR |= DAC_MCR_HFSEL_0; //Must set this bit, since AHB frequency is >80Mhz DAC1->MCR |= DAC_MCR_SINFORMAT1 + DAC_MCR_SINFORMAT2; //DAC now accepts signed numbers (no need to apply bias) TIMER_dac_init(); //Setting up the timer for triggering DAC DAC1->DHR12LD = 128; //Before the DMA request is generated i

Hi, I want to make communication between stm32h563zit6(Nucleo-H563zi) via  USB communication, i have tried configuring various UART/USARTS but not able not make communication.I had verified it by sending some data from stm32  ,and tried to see it on putty gen.It is very important for our project  can somebody help.Please , Thank you. 

我用板子A：STM32H743VIT6，HAL库开发，版本v1.9.0HSE=20M，主频480M串口1使能，DMA发送，IDLE+DMA接收数据。发送使用1ms定时器进行DMA串口发送，发送间隔1ms，发送数据长度18字节。板子B：STM32F405RGT6，HAL库开发，版本v1.27.0HSE=8M，主频168M串口2使能，DMA发送，IDLE+DMA接收数据。数据发送使用1ms定时器，10ms间隔通过DMA发送数据，发送数据长度18字节。连线板子A的Tx-板子B的Rx。板子A的Rx-板子B的Tx。问题：H7板子数据发送正常，统计1s内，理论应发1000*18=18000字节，实际收到18000字节。但是F4板子数据收到不足18000字节，发送数据也丢字节。IDLE中断没有耗时操作，只把收到数据长度进行累加，然后退出。 

Hello,I am new to dual core controllers and I had a question on how the internal ST bootloader works for STM32H755, till now I have used STM32F4 and STM32F7 series with single core and i have loaded User code using UART and ST Flash Loader, as I understand when the internal ST bootloader starts running it loads the used code to 0x08000000 location and jumps to that location at the end of the download where our user program resides. In STM32H7 as we have dual core and each core has a specific address where it boots from Cortex-M7 - 0x08000000 and Cortex-M4 - 0x08100000, when I turn the boot switch and start loading user code it loads the Cortex-M7 core at location 0x08000000 but I am confused on how to load the Cortex-M4 core at location 0x08100000? Is it handled by the ST bootloader ? is there an option to select loading M4/M7 core in the ST Flash Loader?

Is it possible to switch  VREFBUF clock off after configuration for power save? So the clock is off and the buffer is providing Vref.In DS there is no mention about it (e.g OPAMP has this note).

Hi All,I’m new to using the STM32H563 solution. To send SPI data using DMA, I referred to the sample code from the SPI DMA sample of the H533RE project.I'm not sure when exactly the SPI is start to transfer the data by DMA.The following is a part of my test code and the analyzer result. In Main Function:  /* USER CODE BEGIN 1 */ volatile uint32_t curr_tick = 0U; // LL_DMA_InitTypeDef DMA_InitStruct = { 0 }; /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ /* System interrupt init*/ NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); /* SysTick_IRQn interrupt configuration */ NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 15, 0)); /** Disable the internal Pull-Up in Dead Battery pins of UCPD periphe