STM32 MCUs Products

We set up classic CAN on the stm32h747I-DISCO dev board and listen for interrupts on every message:extern "C" void HAL_FDCAN_RxFifo0Callback(fdcan_handle* hfdcan, std::uint32_t RxFifo0ITs) { if ((RxFifo0ITs & FDCAN_IT_RX_FIFO0_FULL) != RESET) { LOG_ERROR("FIFO0 full\n"); } if ((RxFifo0ITs & FDCAN_IT_RX_FIFO0_MESSAGE_LOST) != RESET) { LOG_ERROR("FIFO0 message lost\n"); } if ((RxFifo0ITs & FDCAN_IT_RX_FIFO0_NEW_MESSAGE) != RESET) { if (auto* can_reader = can_reader_instance.load(); nullptr != can_reader) { can_reader->flush(can::fdcan1); } } } in flush(), we call HAL_FDCAN_GetRxMessage() over and over to read the FIFO elements into an std::vector and then we print them from the vector. We are anticipating an average message frequency of 1 message per 1ms, but at this speed, we are seeing the FIFO fill up faster than we can read from it. The fastest I have seen a message be han

Hello All, I am trying to talk to an FRAM over FMPI2C on the STM32F446 using DMA, but the DMA is not able to "start". I am using the Mem_Write_DMA function in stm32f4xx_hal_fmpi2c.c.When I do a side by side comparison with the Mem_Write_DMA function in I2C there are some differences, For example in I2C, the start, device address and the memory address is sent as a blocking call using I2C_RequestMemoryWrite. For the FMPI2C, the start, device address and the first byte of the memory address (memory address is 16 bit) is sent in a blocking all, and the next byte is sent via the interrupt in FMPI2C_Mem_ISR_DMA. After the second byte is sent, transmission to start the data transfer gets initiated by FMPI2C_TransferConfig. But when it tries to send the data, the interrupt fires again this time just sending 0xFF's which are being loaded in the TXDR register in the previous stepMem_write_DMA --> Send Device Address & First Byte of Memory Add --&

What's the difference between enabling high cycle flash from option bytes on an H5 versus just using that section of flash by reserving it in the linker instead, apart from the ECC change?

I have an application that debugs correctly when I loads it at address 0x08000000.I'd like to use a bootloader, so I've changed the ld file, and choose, as flash origin, the address FLASH (rx) : ORIGIN = 0x08020000, LENGTH = 1920KBut, in this case, when I debug the application, the debug takes me in instructions that don't correspond to what I'm doing, I don't know how to explain, for example it takes me in the middle of a for cycle, but without passing from the starting....it seems that the debug is not aligned. Do I have to change something else to debug not starting from 0x08000000.?Or what can I do to check what's wrong?Thank you.IB.

I'm trying to crank up the clock to Timer1 to be able to count high frequency events with better resolution.  If I set the SYSCLK to 128 I get a hard fault when my code reaches SystemClock_Config().  Even if I keep the AHB bus at the same speed (64Mhz) using prescaler.  In this case the only clock difference seems to be SYSCLK value.Here's the first configuration which works ok:and here's the other where it will hard fault:

Hi all, I am using STM32F7439Zi MCU, I would like to create the master + slave pwm signals with the relation that at the falling edge of the master, the slave's pulse will be started.  Both PWM signals has the same frequency, the duty cycle of the master and the slave can vary.The set up as followTIMER 2 is set to Master:Slave Mode: DisableChannel1: PWM Generation CH1Channel2: Output Compare No OutputTrigger Output (TRGO) Parameters:- Trigger Event Selection: Output Compare (OC2REF)Output Compare No Output Channel2:- Mode: Active Level on matchTIMER 3 is set to Slave:Salve Mode: Trigger ModeTrigger Source: ITR1Channel1: PWM Generation CH1Channel2, 3, 4: DisabledThe code is simple:HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_1); // 1st output signalHAL_TIM_OC_Start(&htim2, TIM_CHANNEL_2); //

Hello All,I am using STM32H533 series controller in our application and trying to read internal MCU temperature reading using ADC. But not getting value properly can any one please help me and provide sample example that support for STM32H5 series to read internal MCU temperature?Any help most appreciate and thanks in advanced...!!

I am using a custom PCB with stm32g474 and I am trying to get the CAN peripheral working. I believe I have everything set up correctly (bit rate, RAM etc) but when I call HAL_FDCAN_AddMessageToTxFifoQ(), FIFO is full error is raised after 3 iterations.Any help is appreciated.

Hello community,I've been trying to implement the dual bank boot on my L476RG and run the app on the bank 2 after reset by setting the option byte BFB2 to 1 and it didn't work. Tried a lot of things and specially setting SCB->VTOR = 0x08000000 in the SystemInit() function for the bank 2 and still didnt work. With BFB2=0, app 1 works fine but when setting BFB2=1, after a reset, none of the apps work.At this point I don't know what to do, I've tried it all (both just with code and using the cube programmer) Greetings!

I have4 set up a 9 channel DMA adcBelow is the DMA configuration in the IDEThis is the ADC configurationThis is the IRQ routine

Hello, this is a general question for my understanding.when I single stepped* through my SPI code, I encountered some unexpected behavior. But when I run over the code, it worked as expected.*During this time, I had the peripheral SPI view opened.So my question is, when the debugger updates the view, e.g. by showing me the content of the SPI_RXDR register in the peripheral view, will this already have an effect on the SPI HW, like when I read the SPI_RXDR with SW ?Or can the debugger read the registers somehow different ?(A read to SPI_RXDR will have effect to RXFIFO and Rx-Flags)    

Select PA1 as TIM2 CH2, those code are copy from ST official example(TIM21), and changed to TIM2.no output from PA1, code as below:void ConfigureTIM2AsPWM_EdgeAligned(void){/* (1) Enable the peripheral clock of Timer x *//* (2) Enable the peripheral clock of GPIOA *//* (3) Select alternate function mode on GPIOA pin 1 *//* (4) Select AF2 on PA1 in AFRH for TIM2_CH2 */RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; /* (1) */RCC->IOPENR |= RCC_IOPENR_GPIOAEN; /* (2) */GPIOA->MODER |= 0X00000008; /* (3) */GPIOA->AFR[0] |= 0X00000020; /* (4) *//* (1) Set prescaler to 15, so APBCLK/

We are currently developing a new product using STM32H723VGT6 (LQFP100 package).We purchased 10 pieces, and during initial board bring-up, we are observing that several chips from the same lot are unable to communicate via SWD (Device ID read failure) despite proper power supply, clock, and reset configurations.The issue persists across devices assembled using different methods (SMT reflow vs. manual soldering).  This indicates that the problem is not related to PCB assembly or reflow quality, but potentially to the devices themselves.I am using the ST-LINK from the Nucleo-H743 board, where the on-board CPU's SWDIO and SWCLK pins have been set to high-impedance (floating) mode to enable external target debugging.Additionally, we initially attempted to use ST-LINK V2 but were unable to establish any connection, so we abandoned that approach.We then tested with both ST-LINK V2.1 and ST-LINK V3, and both produced the same results as described

What is the correct way to read high cycle flash data.When i read address 0x916800 i get a Hard fault. Clearing and writing the this address works fine.With reading i have a problem. bank 2 has EDATA enabled for the last 2 pages. Can you give me a code example for reading the memory correctly?

Hello,I’m currently working on integrating the HX711 load cell amplifier with my NUCLEO-F767ZI development board. However, I’m having some difficulty determining which GPIO pins to use for the SCK (clock) and DT (data) lines.As I’m relatively new to working with STM32 boards, I’m unsure how to properly select the appropriate GPIO pins for this setup. I came across a video demonstrating the HX711 with an STM32F103C8T6, where PB9 was used for SCK (output) and PB8 for DT (input). However, since I’m using a different board, I’m not sure if the same pins apply.Additionally, someone mentioned that on certain STM32 boards, PA pins are typically analog and PD pins are used for digital signals. I’m not sure if this is relevant to the NUCLEO-F767ZI, but since the HX711 sends digital signals, I was considering using PD pins. I would appreciate any guidance on which pins are best suited for this application, or if there are any specific considerations I should keep in mind.

The TI motor drivers mct8329a and mct8316 require 100us delay between i2c data bytes. This can't include the acknowledge bit, but requires holding down the clock between transfers for the 100us. it is due to a bug in the TI chips that can't stretch clocks. Not doing this properly (according to TI) causes the chip control to freeze requiring a reset to recover.I'm using an STM32F429/439 MCU and my firmware is utilizing the STM32F4xx HAL, specifically the stm32f4xx_hal_i2c files. I'm using host mode on the ST for the driver chip slave. I have added blocking delays (using a 1us timer) to achieve the 100us delays to HAL_I2C_Master_Transmit, I2C_MasterRequestWrite(), HAL_I2C_Master_Receive() and I2C_MasterRequestRead() functions. I've had to tweak some of the status register setting, particularly the I2C_CR1_ACK flag.I've been successful getting the behavior I need for most of the transactions. The transmits all work well, where I'm having difficulty is with the first two b

Dear all,I have dev a custom board  pcb based on stm32h743ii with 32MB of flash and 32MB  sdram FMC  for a 7 inch lcd HD. I am new on cubeide i coming from esp32 world and i have some programing dev question .Is it a good idear to implement :To partition the flash in 2 regions 1 for system the 2  to store image in the flash in png or jpeg format then load them....What is the best solution for this family of mcu.   

I am working with the STM32U5G7 microcontroller and have successfully implemented entry into STOP2 low-power mode. My system clock is 80Mhz(HSI, PLL), However, upon wake-up triggered via LPTIM . LPTIM is configured as counts internal clock events with 100ms Interrupt .I am observing a significant current spike. I am looking for an effective method to minimize this current surge during the transition from STOP2 to active mode. I have added my code for reference.  /* USER CODE BEGIN Header */ /** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************************************** * @attention * * Copyright (c) 2025 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file * in the root directory of t

求一个demo 

Pin 2 is connected to Boot0. is it Okey to do this (not using resistors).?

Dear STM Community and Experts,we are trying to implement a dual-port USB-C design using STM parts with the following requirements:Port 1: USB-C Power Delivery (PD) Sink, 100W, no dataPort 2: USB-C non-PD Source 5V 2A max., USB 3.1 Gen 1 Data, Display Port (DP) Alt-ModeThere's plenty of documentation by STM on USB-C, but unfortunately we still have some uncertainties mainly about the companion circuitry and tying it all together.We selected STM32G0B1 as the Platform Policy Device (PPD) and are planning to implement both UCPD interfaces on it, one for each USB-C port, using STM's UCPD firmware. The selection of the companion-chips for these port requirements is less clear to us:For Port 1 (100W PD Sink) we decided to use TCPP01-M12 as the companion chip and STL40DN3LLH5 as the VBUS load switch.For Port 2 (DP Alt-Mode, U

Hi, I have Interface (type MASTER) 10-bit + CLK, FCLK=~9MHzCan I use DCMI to read 10-bit without VSYNC and HSYNC?Or some other method? The usual assembler software method "ldr r1, [port, #....]" is too slow and despite many attempts it has not been possible to do it this way.Cpu CLK ~400MHz, AHB4 ~200MHz, ARB4 ~100MHz

Hello All, I am doing this post after trying everything I can to solve my Issue. I have a STM32F411 Blackpill connected on an Apple II Bus Slot.The Apple II has a clock (Phi0) close to 1 Mhz. Phi0 is connected to Pin A2 where I have setup a Falling & Rising Edge interrupt. The GPIO B12 is used to check the latency between each Phi0 phase,- at the falling edge of Phi0 B13 is clear- at the rising edge of Phi0 B13 is set, I have nothing else running on this STM32, I am observing a delay (avg 335 ns) between the interrupt detection and GPIO set or clear.Using the logic analyzer: 

Hi all,I'm building a discharger using my STM F446RE, such that it's RTC registers are used to store data that'll be loaded to set parameters in my code every time the discharger is plugged into the power. Just to clarify - I'm NOT using the RTC as a clock, I just use it's registers to store data.For a reason I don't understand, the RTC's registers get cleared (i.e. all data is set to 0) every time the discharger is unplugged from the power. I saw that plugging a battery to the Vbat pin helps keep the RTC consistent, but my superior claims that it's actually not needed in this case, because I'm only using the RTC's registers and not the clock itself (so the data should be saved regardless of power connection).Is my superior correct, and there's a way to solve this without plugging a battery to the Vbat pin, or is he wrong and the Vbat pin must be fed a battery for the RTC to save it's register's data?Thanks in advance for any help on the subject!

Hello, we are facing some problem entering DFU mode from application code on our custom boards equipped with STM32H7B3 with bootloader release 0x92.  On contrary, everything works fine with same board equipped with STM32H7B3 bootloader release 0x91. Beside the notes on AN2606 related to bootloader history, can someone from ST point out if are there any other changes on bootloader that can cause this strange behaviour? Thanks, Regards,