STM32 MCUs

Split from FATFS for STM32u575 - this is a different issue.helloo, i did the same exact thing and everything compiled properly, but after running it, the code freezes when the f_mount() function is encountered. Did you find a solution to your problem ??  

Hi Folks, I'm working on pattern generation on GPIO pins and I've done it successfully using bare-metal programming approach. I used TIM1 to trigger DMA2 to take data from a buffer and send it GPIOA->BSRR.  But when I try to change the timer from TIM1 to TIM2 and change the respective DMA stream, the same code does not work. code:   uint32_t signal1[6]; //pattern no included // Enable clocks for GPIOA, TIM2, and DMA1 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; RCC->AHB1ENR |= RCC_AHB1ENR_DMA1EN; // Configure GPIOA Pins 0-5 as output GPIOA->MODER &= ~0x00000FFF; // Clear mode for PA0-PA5 GPIOA->MODER |= 0x00000555; // Set PA0-PA5 as General Purpose Output // Configure TIM2 for DMA requests on update event TIM2->PSC = 0; // Set prescaler to 0 TIM2->ARR = 999; // Set auto-reload value (adjust for timing) TIM2->DIER |= TIM_DIER_UDE; // Enable update DMA request TIM2->CR1 |= TIM_CR1_CEN; // Enable TIM2 // Configure

Hello,Using a NUCLEO H7S3L8, I'm trying to run a test where, using circular DMA with a linked list, I'm trying to send a buffer in memory over to the SAI for audio playback, using an external DAC. This configuration is based on either other tutorials or the reference manual, but it always throws a User Error flag and calls the DMA's IRQ handler, right after the HAL_DMAEx_List_Start_IT() call (whether done on its own after the necessary configuration, or as part of HAL_SAI_Transmit_DMA()). Even with some changes, it always yields the same results. The only one that seemed to have any effect was setting the Transfer Event mode to trigger the TC flag for each linked list item, which confirmed that a transfer might have been completed, despite the error flag.I have also seen GPDMA being configured with circular, using both Standard Request Mode and a Linked List, but haven't gotten any success out of that myself (with even TC flag not being raised).In case it causes any comp

Hi all,I'm unable to install Cube IDE under W10.I tried to play with permissions/administrator/... I always get an error:NSIS error : Error launching installer.All other items (CubeMX, Programmer, Monitor ) were installed without any problem.Thanks for help.

Hi guy I want to use Nucleo h755zi-q to sent modbus TCP/IP but I have a little time and I'm a beginner. I watched some GitHub but I don't understand. Some one can help me pls 

I am currently performing the bring-up of a custom PCBA using the STM32H755ZIT3.My design is intended to use the Internal LDO only, bypassing the SMPS to reduce component count (i.e. one less inductor in my layout).Here's few details about the MCU power section of my SCH (also, please check attached capture):SMPS Pins: As per the Reference Manual for "LDO-only" mode, I have grounded VFBBSMPS, VSSSMPS and VDDSMPS, whereas VLXSMPS is floating.VCORE/VCAP: I have placed the required 2.2uF decoupling capacitors on VCAP_1, VCAP_2, and VCAP_3. No external inductor is present on the layout.What I'm observing is that at power-on, VCORE remains at 0V. Consequently, the target is not detected by the ST-LINK. If I instead "jumpstart" the board by applying an external 1.2V to the VCAP nodes, the MCU becomes reachable via SWD, and I can successfully modify registers. I suspect a conflict between my hardware layout and the factory default reset value of the PWR_CR3

Hello,How do I enable 8MB external SPI Flash on the WBA65+RVA15MD using TouchGFX Designer?Thanks.  

I am using the STM32G474 in STM32CubeIDE with the built-in CubeMx environment. MX_DAC1_Init() to setup the DAC1_Ch1. Internal VREF+ is 2.9V. When it is buffered DAC, I get output very close to 2.9V at max(4095). However if i switch to unbuffered mode, the output is only 1.4+V(about half of 2.9V) at max setting of 4095. There was no mention in the reference manual RM0440 about the change in gain for buffered or unbuffered DAC. Is this normal?

 Can somebody tell me whether I am, or not, powering this STM32H725RG in the right way?As far as I know, after reading several times the specs, the 68 pin package doesn't have LDO (SMPS only).I've built my first board this way and the MCU got burnt. Thanks.

Hi everyone,We’ve been using the XCUBE-SBSFU bootloader in our industrial-grade project and recently noticed that SBSFU is now labeled as a legacy bootloader. It seems the new recommended bootloader is based on MCUBoot. Additionally, I’ve come across information on STiRoT, which implements a root of trust similar to what SBSFU legacy already offers.This has left us with a few questions, and we’d greatly appreciate any clarification:Why has SBSFU been marked as legacy and replaced? Were there specific limitations or issues with SBSFU that led to this change?How do we transition to MCUBoot? The MCUBoot website mentions it doesn’t currently support STM32 controllers, and the ST wiki says support is “coming soon.”What role does STiRoT play? It seems similar to SBSFU legacy but is relatively new. Is it a better option? Should we consider switching to it, and if so, why?Any insights or guidance would be greatly appreciated.Thanks.@Jocelyn RICARD I’ve noticed your valuable input on SBSFU

Hi Everyone,I'm following the: How to enable RDP-like product state flash protection in STM32H5 microcontrollersexample using an STM32H573xx devkit and an ST‑Link. I ended up bricking my devkit while attempting the regression step. My ST provisioning integrity status:0xf5f5f5f5I have another dev kit available for testing, but I haven't been able to find an H573xx example that uses the HAL code base. If anyone can point me to a HAL-based example for the STM32H573 series implementing JTAG protection. Many Thanks! 

I'm trying to read a NTC temperature sensor, but the readings I'm getting are very inconsistent and at times just way off.  I have nucleo on the way but this testing I'm doing is on a blue pill.The sensor is sitting in a cup of water, so temperature should be very consistent.  Here is the readings I'm getting which are done at 1 second intervals, I don't need speed.  The temperature of the water is about 21C.  The sensor accuracy is rated +/- 1.4C at 25CTemp k: 293. c: 20.8Temp k: 293. c: 20.7Temp k: 294. c: 21.2Temp k: 292. c: 19.5Temp k: 307. c: 34.1Temp k: 295. c: 22.3Temp k: 294. c: 20.8Temp k: 293. c: 20.7Temp k: 294. c: 21.5Temp k: 293. c: 20.7Temp k: 294. c: 21.3Temp k: 294. c: 21.4Temp k: 293. c: 20.8Temp k: 293. c: 20.5Temp k: 294. c: 21.1Temp k: 292. c: 19.7Temp k: 266. c: -6.5Temp k: 293. c: 20.5Temp k: 293. c: 20.8Temp k: 291. c: 18.8Temp k: 266. c: -7.1Temp k: 293. c: 20.6Temp k: 294. c: 21.3Temp k: 294. c: 21.3Temp k: 293. c: 20.6Temp k: 294. c: 20.9At

Hello, I have a problem to display the screen on my board, it is always blank white screen. Below is a simple Screen:It shows as a blank white screen on my board, please find attached relevant files lest it is a hardware problem. Please advise. Best regards

Hi there, I want to use the AS5048A SPI encoder with the STM32 Motor Control Work bench SDK to precisely control a 3 phase GL30 KV290 Motor. I noticed STM motor control work bench only supports quadrature encoders and I can apparently use custom code to make an absolute encoder work. Is there any information about how to do this?  

Hello!I am facing some problems with implementing TLSv1.3. I have enabled NX_SECURE_TLS_ENABLE_TLS_1_3 and NX_SECURE_TLS_TLS_1_3_ENABLED from CubeMX.I added these into my code:extern const NX_SECURE_TLS_CRYPTO nx_crypto_tls_ciphers_ecc; extern const NX_CRYPTO_METHOD *nx_crypto_ecc_curves[]; extern const UINT nx_crypto_ecc_curves_size; extern const USHORT nx_crypto_ecc_supported_groups[]; extern const UINT nx_crypto_ecc_supported_groups_size; // ... UINT tls_setup_callback(NXD_MQTT_CLIENT *client_pt, NX_SECURE_TLS_SESSION *TLS_session_ptr, NX_SECURE_X509_CERT *certificate_ptr, NX_SECURE_X509_CERT *trusted_certificate_ptr) { // ... /* Initialize TLS module */ nx_secure_tls_initialize(); /* Create a TLS session */ ret = nx_secure_tls_session_create(TLS_session_ptr, &nx_crypto_tls_ciphers_ecc, crypto_metadata_client, sizeof(crypto_metadata_client)); if (ret != NX_SUCCESS) { return ret; } /* Force the use of TLS 1.3 */ ret = nx_secure_tls_session_protocol_v

Post edited by ST moderator. In next time please use </> to share your code. Thank you for your understanding. hi, I am using stm32U5's uasrt2 DMA RX ,  DMA interrupt coming, usart idle int coming, ROR value right, but rx_buffer was not refreshed by DMA, here is my part of code.   /* USER CODE BEGIN PV */ uint8_t loop_TX = 0xaa; uint8_t loop_RX = 0x0f; /* USER CODE END PV */ ............................. /* MPU Configuration--------------------------------------------------------*/ MPU_Config(); /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); /* GTZC initialisation */ MX_GTZC_Init(); /* USER CODE BEGIN SysInit */ delay_init(); HAL_Delay(100); /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_GPDMA1_Init(); MX_SPI2_Init(); MX_USB_OTG_FS_PCD_Init();

Dear Sirs, we have a SPI CRC problem we thried heavily to solve, but no success.We broke it down to just send one byte of data, so the CRC is known in advance and it is easy to debug.Here the description what we did:DevicesMaster: STM32F7 (SPI1)Slave: STM32F4Communication mode: SPI full duplexData width: 8 bitCRC enabled on both sidesCRC ConfigurationCRC polynomial: 0x07Data size: 8 bitMSB firstOnly one data byte used for testingTest frameData byte transmitted by slave:0x55Expected CRC (CRC-8, polynomial 0x07):0xACSPI clockThe SPI clock on the master is set to the lowest possible speed:Prescaler = 256Therefore there should be no timing issue with the CRCNEXT bit being set during the last data frame is clocked.We use HAL 1.3.3 and HAL_SPI_TransmitReceive_IT on the master sideObserved SPI signals (oscilloscope)On the SPI bus we observe exactly the expected sequence:0x550xACSo the slave transmits the correct CRC value.Master behaviourWhen the first SPI interrupt occurs on the master

I am struggling to wakeup STM32N6570-DK from standby mode with user button (WKUP3).I created an isolated CMake + VSCode test project and share it in zip file. Based on latest CubeMX 6.17.0 and STM32N6 HAL 1.3.0. There is application and FSBL but I only use FSBL and do not jump into Application. My intention is that after wake-up, MCU launches Boot ROM that launches FSBL.The core part of the code is:static void EnterStandbyMode(void) { PWREx_WakeupPinTypeDef sWKUPConfigs = {0}; /* Prevent any disturbing interrupts */ __disable_irq(); /* Enable the Wake-up pin functionality */ sWKUPConfigs.WakeUpPin = PWR_WAKEUP_PIN3; /* PC13 (User button) */ sWKUPConfigs.PinPolarity = PWR_PIN_POLARITY_HIGH; sWKUPConfigs.PinPull = PWR_PIN_PULL_DOWN; HAL_PWREx_EnableWakeUpPin(&sWKUPConfigs); HAL_PWR_ClearWakeupFlag(PWR_WAKEUP_FLAG_ALL); /* AN5946 and errata say that BSEC should be enabled to go stand-by. */ __HAL_RCC_BSEC_CLK_SLEEP_ENABLE(); __HAL_RCC_BSEC_CLK_ENABLE(); /* Set init

 Hi everyone,I’ve successfully created and imported a CMake-based project for the STM32F777NIH in STM32CubeIDE 2.0.0. The project builds and compiles without any issues.However, the IDE cannot properly resolve headers, some macros, variables, and some struct definitions. To fix this, I enabled:set(CMAKE_EXPORT_COMPILE_COMMANDS TRUE)in my top-level CMakeLists.txt, which correctly generates a compile_commands.json.In CubeIDE, I also enabled C/C++ General → Preprocessor Include Paths, Macros etc. → Providers → Compilation Database Parser, and pointed it to the generated compile_commands.json (AN5952).But CubeIDE shows:Invalid build parserAnd the error log contains:“Compilation database parser does not have a build command parser configured.”So it seems CubeIDE refuses to use the compilation database to resolve include paths, even though the file exists and is valid.Is there any known workaround to allow STM32CubeIDE to consume compile_commands.json for indexing?Or any other reliable

Hello Team,  Since SCB and other core registers are not included in the SVD file for STM32H5, could you please advise on the best way to access or monitor SCB registers (e.g., VTOR, AIRCR, ICSR) during debugging in VS Code with PlatformIO? Specifically, I'm looking for guidance on: How to inspect SCB register values during a debug session (e.g., trap cause, exception entry). Recommended approach to capture trap/exception information like: HardFault status (HFSR) Configurable Fault Status (CFSR) Bus Fault (BFAR) MemManage Fault (MMFAR) Any suggestions for manual mapping or watch expressions in the debugger that would allow me to monitor these registers, since they’re not shown in the peripheral view. Any tips or best practices for bare-metal Cortex-M33 debugging without full SVD support would be greatly appreciated. Best regards,Manikanta 

I am working on STM32CubeIDE_2.1.0 after one week and suddenly it stopped showing create new STM32 Project. It is showing simply as in screenshot, I am unable to create new STM32 project. Thanks & RegardsChanchal

Are there any expansion boards with Quad SPI NOR Flash chips? I am interested in using it with a NUCLEO-WB55RG board.Preferably it should use the Macronix 25L6433FM2I-08G chip, but that is not a hard requirement. This chip is found on the X-NUCLEO-GFX01M2 board, but it is implemented as a standard single SPI interface.Thanks

Hi all,I’m working on porting a firmware from a Microchip PIC18F66J50 to an STM32C071.The original device communicates successfully with Windows and Android devices over USB, through an app developed in Flutter (Android Studio) using the QuickUsb library.On the STM32 side, I’m now using the USBX stack. After quite a bit of work, I managed to get the USB communication fully working with Windows — enumeration and protocol exchange both succeed.However, while the device correctly enumerates on Android, the protocol communication fails.Since the Android app already works perfectly with the original Microchip-based device, I assume that no changes are needed on the app side. This suggests that the issue lies in how the STM32 presents itself to Android (possibly in the USB descriptors or class/interface setup).Has anyone experienced similar issues with USBX on Android, or are there known differences in how Android handles vendor-specific protocols compared to Windows? Thanks for your he

I want to be able to program the external flash via VCP. So far, I have taken the combined code from the CM4 and CM7 core, then using memory address 0x90000000, I write to the QSPI using the BSP function: if (receiving_ext_flash) { if (BSP_QSPI_Write(0, Buf, qspi_write_address, Len) != BSP_ERROR_NONE) { CDC_Transmit_FS((uint8_t*)"QSPI Write Error\r\n", strlen("QSPI Write Error\r\n")); receiving_ext_flash = 0; return; } qspi_write_address += Len; } Has anyone tried doing something like this? I have not been able to get this to work. Thanks!

Is there any way to optimize the IPD BALFHB-WL-01D3 to work at 865MHz at 22dbm for STM32WL55? And is there any hardware design guide for power of STM32WL like it is there Hardware design guide for STM32L0 application note AN4467.