STM32 MCUs Embedded software

Hi everyone,I’m working on the STM32N6570-DK and trying to run a NetXDuo Web HTTP server as part of a secure application executing in XIP (external flash).I started from the available examples (which run from internal RAM / FSBL), but after moving the application to XIP, I’m facing instability issues (intermittent crashing issues, no ping response, etc.).From initial debugging, this seems related to:Execution latency from XIPPossible cache / MPU configuration or memory placement issuesMy questions:Is there any official or reference example for:STM32N6570-DKNetXDuo (HTTP Web server)Running in XIP mode (external flash)Within a secure application contextAre there recommended guidelines for:Placing NetXDuo and ETH driver code (RAM vs XIP)?MPU/cache configuration when using XIP with networking?Memory regions for packet pools and DMA buffers?Has anyone successfully run NetX Duo HTTP server reliably in XIP on STM32N6?

Hello everyone,I want to develop an IoT application based on STM32L496 and I am working with the BG96 modem that is embedded on P-L496-CELL02 board. The exchange of AT commands with the modem is succesfull, but, even though i insert a plastic microsim (I have actually tried two of them), i keep getting an error message "Sim Not inserted". I have enabled the simselect0 (PC2) and simselect1 (PI3) pins in CubeMX, as it is indicated by the manual (set to 0 and 1, respectively) and verify their value with my code. The board is powered with an external supply source, through Arduino Vin. The BG96 firmware version is BG96MAR02A08M1G. I have inspected soldering, short-circuits between the sim socket and contacts and everything seems to be alright. I cannot understand what could possibly be the problem, does anyone have a clue? I would be grateful.Here is my code. All AT commands return OK and seem to work.  int main(void) { /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU C

Hi Everyone, I am working on a NUCLEO-H753ZI board and want to set up Ethernet RMII communication using LwIP in STM32CubeIDE. I am looking for step-by-step guidance from the IOC file configuration to the generated code, including: Pinout configuration for RMII. LwIP middleware settings. MPU region configuration for Ethernet and LwIP memory Generating code and linker settings  Any tips to ensure that ping from PC works reliably   Could provide a complete, detailed guide. how to configure CubeIDE and LwIP for NUCLEO-H753ZI.     Thanks in advance.

Hi, for an old project of mine I need the STM32CubeF4 v1.21.0 +  HAL v1.5.7 but I can't find the download links to that version anymore. It seems like they got deleted from GitHub? Can someone supply me with the old version of the STM32CubeF4 including the HAL? Cheers!

Hi Is there an example using a STM32C5 as a USB host controller connecting a USB HID (mouse/keyboard) as input device?

We are developing a safety-related application based on an STM32 microcontroller and aligning our design with IEC 60730 Class B requirements. In our application, we implement fault detection mechanisms for analog and digital signals (e.g., sensor inputs, voltage monitoring, heater control). Due to noise and transient conditions, we are considering adding a software debounce/filtering time before declaring a fault. We would like clarification on the following points: Does IEC 60730 Class B explicitly require or prohibit the use of debounce time for fault detection? Is it acceptable to introduce a software debounce (e.g., 100 MSto a few seconds) to avoid false fault triggering? Are there any recommended guidelines from ST for implementing debounce while still complying with Class B requirements? Does the STM32 IEC 60730 Class B self-test library include any reference implementation or best practices for handling such debounce scenarios? 

Config:stm32h743iiT6SDRAM 32mb model w9825g6khFLASH 32mb QSPI 1 bank 4 lines w25q256jv2Screen 7 inch 24bit rgb888I am really stuck on stm32 jpeg hardware vs libjpeg working 1 Decoding 1024x600 stored in qspi flash with jpeg harware stuck with the jpeg markers === FINDING JPEG IN QSPI === Found JPEG at offset 0x069000 (address 0x90069000) :triangular_ruler: Found SOF0 at offset 484: 160x94 Dimensions: 160 x 94 Found JPEG at offset 0x089000 (address 0x90089000) :triangular_ruler: Found SOF0 at offset 552: 160x93 Dimensions: 160 x 93the image is really 1024x600 stored has standard in photoshop to avoid progressive stuff.... Offset 7252: SOI (start) - Offset 7418: SOF for 160x94 thumbnail - Offset 11289: EOI for thumbnail - Offset 15044: SOF for 1024x600 main image ← Your real image! - Offset ???: EOI for main image Is there any body witch have faced those problems to hardware jpeg decode can you share your experience .....

Hi,The project was created in stm32mx from the example project cortexm_sysk.It was generated as a CMake project and developed using VS Code.The "USB Device Middleware Library MCU Software Component" library, version "V2.11.4 / 11-April-2025", was manually added.CDC alone OKUVC alone OKCDC/HID OKCDC/UVC NOT OKSee file in attachment.I noticed the file descriptor is large (239 bytes). Is that a problem?Is there another setting I need to change?Regards,Sébastien

Hello, I am testing SPI5 TX by GPDMA on an STM32N6 device and I found behavior that seems inconsistent with the reference manual. MCU / Environment MCU: STM32N647X0H Toolchain: STM32CubeIDE 2.1.1 CubeMX / CubeN6 version: STM32Cube_FW_N6_V1.3.0 Issue summaryI configured SPI5 as: Master Simplex TX-only Software NSS SSI set high I configured GPDMA1 Channel0 as: Memory-to-peripheral Source = TX buffer Destination = SPI5->TXDR Transfer length = 8 bytes TX pattern = A5 5A A5 5A A5 5A A5 5A Observed behavior If I write data directly to SPI5->TXDR by CPU, MOSI outputs correctly. If I use GPDMA for SPI5 TX, SCK may appear, but MOSI stays low / no valid TX data is output. I reduced the project to a minimal LL test case and the behavior is reproducible. What I already verified Same SPI5 pin configuration is used in both tests. CPU TX path works with the same SPI configuration. TX buffer content is correct in memory (A5 5A ...). DMA source addres

Hi community.TLV230adc5140 - SAI 4CH(TDM) - STM32 - USB_FS_ 4CHmic - Window(LInux RP5) I reuse partly code from memsmic1 project to create 4 microfone audio device. Everything look well for channel 1 and 2 I got some trouble whit CH3 and CH4.  Please help whit    wrong channel mapping for channel 3 and 4. It is mapped on channel  1 and 2  on usb interface. One can see it on attached picture. Here is TLV switched off, SAI(DMA call back) reused for 4 sin generator 1,2,3,4 kHz for every supposed channel. Here you see the picture.Where i  am wrong?    

Hello I've been trying to recreate the DCMIPP_SnapshotDecimation example with STM32CubeIDE, I have been running into several issues. I have solved most of them, I am encountering a memory error while debugging my code. I was able to flash and debug the original example successfully on the STM32N6570-DK. However, when I try to read a value from the AXISRAM address (0x34200000), it fails: (address does not exist and unable to reconnect to target device). AXISRAM3 which it should be the address 0x3420000 is activated and initialized in the main. Initialization of  the signal processor and starting the DCMIPP pipeline was passed without any problem:if( ISP_Init(&hcamera_isp, &hdcmipp, 0, &appliHelpers, ISP_IQParamCacheInit[0] ) != ISP_OK ) { Error_Handler(); } if( HAL_DCMIPP_CSI_PIPE_Start(&hdcmipp, DCMIPP_PIPE1, DCMIPP_VIRTUAL_CHANNEL0, BUFFER_ADDRESS, DCMIPP_MODE_CONTINUOUS ) != HAL_OK ) { Error_Handler(); }But, trying to access the buffer addr

Hi everyone, I am working on a dual-core project using the STM32H747XI. I am implementing a custom Tickless Idle mode in FreeRTOS on the Cortex-M7 (CM7) core using LPTIM1 as the wakeup source. I’m facing a specific issue regarding the interaction between D1 and D2 domains: The Scenario: CM4 is running a continuous task (intended to stay active). CM7 enters low-power mode via vPortSuppressTicksAndSleep. If I use HAL_PWR_EnterSLEEPMode(), everything works perfectly—CM4 keeps running, and CM7 wakes up as expected. If I switch to HAL_PWREx_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPENTRY_WFI, PWR_D1_DOMAIN), the CM4 core seems to "die" or freeze as soon as CM7 enters the DStop state. Is it physically possible for CM4 to continue executing code if the D1 domain is in DStop (CM4 is using only LPTIM1 on D3 and timers on D2)? Code snippet used on CM7: _weak void vPortSuppressTicksAndSleep(TickType_t xExpectedIdleTime) { // Generated when configUSE_TICKLESS_IDLE == 2. // Functio

Hello, I can't cope with interrupt transactions. (I need it later for composite device).For tests I generated HID device example. When device is connected to host it appears correctly in the system.For interrupt endpoint configured 0x81.I need to answer for interrupt transactions, but which callback is responsible for this?I start debugging from very deep. Breakpoints were set in HAL_PCD_IRQHandler(). As I understand in this functions all usb transactions starts, but I see only interrupts from ZERO endpoint. Dumping by WireShark I see host sends requests to my device x.xx.1 and responses.Why I don't see interrupts for 0x81 (also I check 0x01) in HAL_PCD_IRQHandler()?What I do wrong?

Hello ST Community,I am working on a USB Video Class (UVC) application using STM32H7S3L8 (NUCLEO-H7S3L8) in USB HS device mode.Requirement:Streaming 640×480  30fps (YUY2, uncompressed), requiring ~18.4 MB/s bandwidth.With the STM32 HAL, I can only achieve:~8.2 MB/s (1024 bytes × 1 transaction per microframe)This limits performance to ~13 fps at 640×480.USB 2.0 specification allows up to 3 transactions per microframe for high-speed isochronous endpoints.However in STM32 HAL:ep->maxpacket = ep_mps & 0x7FFU masks transaction bitsNo MC (multi-count) handling in DIEPCTLEndpoint structure has no field for multiple transactionsHAL does not configure high-bandwidth isochronous mode   Does STM32H7 USB OTG HS support high-bandwidth isochronous transfers (2x/3x transactions per microframe) in device mode?If supported:Is there any register-level guidance to configure this?Any example or application note available?

Hi I configured the DFSDM1 on the STM32H753VIT6 for a MEMS Mic.I got the problem that the DMA Callback on (Half)/Full buffer never gets called. I used AN5027 as guideline and the DFSDM Audio ExampleD-Cache disabled and set the Audio Sampling Frequency low (4kHz) to debug over UART. Main (snippets):DFSDM_Filter_HandleTypeDef hdfsdm1_filter0; DFSDM_Channel_HandleTypeDef hdfsdm1_channel4; DMA_HandleTypeDef hdma_dfsdm1_flt0; . . . . int32_t LeftRecBuff[1024]; void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) { /*Never Reached*/ } int main(void) { HAL_Init(); SystemClock_Config(); /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_DMA_Init(); MX_DFSDM1_Init(); /* USER CODE BEGIN 2 */ // imu_init(&hspi4, GPIOE, GPIO_PIN_4 /* IIM-42652 CS */); HAL_DFSDM_FilterRegularStart_DMA(&hdfsdm1_filter0, LeftRecBuff, 1024); while (1) {} }Config (CubeMX)/** * @brief DFSDM1 Initialization Function * @PAram None *

I am currently working on the STM32N6570-DK board and need support for MIPI camera interfacing using CSI (not USB).RequirementInterface a MIPI camera using CSIRead camera dataEncode the dataSend it to a PC via Ethernet using UDP streamingSupport NeededHow to configure and enable CSI (MIPI camera interface)Any reference examples/projects for camera bring-upGuidance on reading camera data from CSIAny examples for encoding + Ethernet (UDP) streamingKindly provide any documentation or example projects that can help achieve this.

Post edited by ST community moderator. In next time please use </> to share a code. HI, I have Implemented ADC1 - DMA with one channel and ADC2 - DMA with 7 channels and im transmitting data through UART IT. I want to know if this code works usually. void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) { if (hadc->Instance == ADC1) Print_ADC_Values_IT(); if (hadc->Instance == hadc2.Instance) Print_ADC_Values_IT(); } hadc2 is workin only when i disable HAL_ADC_Start_DMA(&hadc1, (uint32_t*)&adc1_value, 1); Here's the overview of my code: MX_GPIO_Init(); MX_DMA_Init(); MX_ADC1_Init(); MX_ADC2_Init(); MX_USART1_UART_Init(); /* USER CODE BEGIN 2 */ // HAL_ADCEx_Calibration_Start(&hadc1, ADC_SINGLE_ENDED); HAL_ADCEx_Calibration_Start(&hadc2, ADC_SINGLE_ENDED); // Start ADC1 (1 channel) // HAL_ADC_Start_DMA(&hadc1, (uint32_t*)&adc1_value, 1); // Start ADC2 (7 channels) HAL_ADC_Start_DMA(&hadc2, (uint32_t*)adc2_values, ADC2_CHANNE

Hi,I am using STM32H755 where M7 and M4 runs bare-metal firmware using OpenAMP (RPMsg).Sampling rate is set to 250 SPS. The data is sent from M4 to M7 using OPENAMP_send() function.Observation: Data loss of approximately 10% is observed during transmission from M4 to M7. The loss does not follow a fixed pattern.Questions:- Is this an expected behavior with RPPMsg/OpenAMP at this rate?- How can I ensure reliable transfer without data loss? Thanks & Regards,Bhagyashree Ghosh Roy

I am developing a project using the STM32U5G9J. In particular I based our board on the STM32U5G9J-DK2 board. My project includes over the air update for which I am using the external flash that comes on the DK2 board for temporary firmware swapping storage. The external loader MX66LM1G45G_STM32U5G9J-DK2.stldr looks like is not accessing beyond 64MBytes, giving the impression of mirroring the first 64MBytes. I need to be able to have the external loader handle fully the 128 MBytes, as well as my application being able to access the 128 MBytes by code. I am using the STM32CubeIDE 1.19.0. which the IOC file configuration for HSPI is in OCTO SPI mode with the capacity to read 128MBytes. I am using the external loader to manually write certain pieces for debugging purposes. I cannot verify if my code works until the external loader is being able to access the full 128MBytes. Please help me providing the right external loader, as well as the certainty that the IOC file can have the HSPI acce

Greetings!I am trying to establish a connection between STM32F439IIH6 (Slave) and a customize board (Master) through SPI DMA application. The customize board has its own built-in driver with SPI application. The communication between STM32F4 and customize board eventually broke down after few thousands of cycles. Through some investigation, I found out that the SPI_WaitOnFlagUntilTimeout() hangs inside SPI_DMATransmitReceiveCplt(). It sutcks inside the else statement of SPI_WaitOnFlagUntilTimeout(). The clock used in customize board (Master) is 80Mhz with clock division 4/** * @brief This function handles SPI Communication Timeout. * @PAram hspi: pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval HAL status */ static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout) { uint32_t tickstart = 0; /* Get tick */ tickstart =

Hello,WORKING ON : STM32H753I am looking to implement a jump from one application to another on an STM32H7 (Cortex-M7), so that the new application starts as if the microcontroller had just been reset: MSP initialized, VTOR set, caches (and MPU maybe?) correctly managed, peripherals reset, SysTick and IRQs disabled.Knowing that my APP1 is a custom bootloader at address 0x08000000 and my APP2 is my main application with lots of peripherals, timers, DMA, etc. at address 0x08020000.I tried many sequences to make a jump without crashing.My jump from APP2 (app) to APP1 (bootloader) seems to work without bugs:  //disable interrupts __disable_irq(); //disable Systick SysTick->CTRL = 0; SysTick->LOAD = 0; SysTick->VAL = 0; //deinit HAL_RCC_DeInit(); HAL_DeInit(); // __enable_irq(); // vide cache SCB_DisableICache(); SCB_DisableDCache(); __DSB(); __ISB(); // je définis ma table des vecteurs au début de mon IAP donc à IAP_ADRESS (0x08000000), ave

I have enabled USB with the following settings:Following USB middleware is enabled like so:In the linker script I have moved everything from DTCMRAM to RAM.Additional section is specified like so.dma_buffer : { *(.dma_buffer) } >RAM_D2And used like so:/** Received data over USB are stored in this buffer */ __attribute__((section(".dma_buffer"))) uint8_t UserRxBufferHS[APP_RX_DATA_SIZE]; /** Data to send over USB CDC are stored in this buffer */ __attribute__((section(".dma_buffer"))) uint8_t UserTxBufferHS[APP_TX_DATA_SIZE]; At this point USB device enumerates but looks like no descriptors are transferred to the host.I also tried to enable MPU like so:But that did not do the trick.However, when RAM region base address (0x24000000) is used instead of RAM_D2 (0x30000000) for MPU, device enumerates correctly:and there is no need for:__attribute__((section(".dma_buffer")))on rx and tx buffers anymore.Now the question. How to correctly place only the USB related stuff to

Hi,I am new to ST platform, i am facing an issue as below.C:/Users/Yuvaraj/Desktop/Test/1/Middlewares/Third_Party/LwIP/src/apps/http/fs.c', needed by 'Middlewares/LwIP/apps/http/fs.o'. StopI am opened the project from examples codes.Can anyone help ? How to resolve this? Regards,Yuvaraj V

If I don't enable RX line inversion, everything works fine. But when I enable inversion, I constantly get frame errors. The DMA operates in cyclic mode, without interruption. It's just like a ring buffer. In normal mode, everything works without problems. The signal source itself was tested on another device with a purely hardware signal inverter, and everything was fine. It's unclear why enabling inversion causes the problem. Perhaps someone can give me a hint as to what might be causing this? Thank you.

Hi,I´ve problems getting UCPD running on a STM32H563. With STM32G0 I´ve alraedy realized a lot of such projects with UCPD. Hence I suggest, that it maybe is a problem of the DMA which is much more complicated to configure on the H5. Is there any information about how to configure UCPD on H5?Best,Achim