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Hello Team, We are using STM32N657X0H3Q for one of our application, while looking for the voltage level information for pins, we did not get any information for PA0 pin for the controller, specifically i am referring the notes column in pin description section. I hope you are getting my question.  RegardsHarsh Bhavsar 

Hey. I have recently received STEVAL-MKI109D + STEVAL-MKI238A for evaluating LIS2DUX12 accelerometer.I have opened MEMS Studio, chose my evaluation board and performed FW upgrade as prompted by the MEMS Studio.  I have then proceeded to Sensor Evaluation -> Save to File to capture my own data for further processing. Each sample was taken using 5 seconds timeout. So I just click "Start" and proceed with moving the board for 5 seconds. I did the following:1. Capture 3 "flip_down" samples of me flipping down the evaluation board.2. Capture 4 "flip_up" samples of me flipping up the evaluation board.3. Capture 4 "shaking" samples of me shaking the evaluation board.4. Capture 3 "stationary" samples where the device was just sitting on the table. After collecting all samples in .csv format, I have then proceeded to Advanced Features -> MLC and uploaded all collected .CSV data using different class names. See the below:  I noticed that STATIONARY and SHAKING samp

So apparently in 2026, creating a basic embedded C project now requires… a login.Tried spinning up a project in STM32CubeIDE and got a nice “half-built” result:Project created ✔Code generation :cross_mark:Explanation :cross_mark:Turns out the IDE now needs to quietly download the HAL/CMSIS packages, which in turn requires a myST account login… but:It doesn’t tell you thatIt doesn’t prompt you (on Linux at least)It just silently fails and leaves you debugging yourselfSo you end up thinking:“Did I misconfigure the clock? The linker script? The .ioc?”Nope. You just weren’t logged into a website.Nothing says robust embedded tooling like a hidden cloud dependency for generating main.c.Bonus points for the UX where the “login” option is buried under:Help → STM32Cube Updates → Connection to mySTBecause obviously that’s the first place you look when your GPIO project won’t build.Anyway—manual firmware download and local install fixes it. Once you discover the secret handshake.Progress :thumbs_

I need to do keyword spotting and for that I'm trying to classify using CSV files, but they end up being very large because there are so many files. Is there another type of file I can put in NanoEdge or another way to do this?

Hi @Ghofrane GSOURI. I just noticed new STM32CubeMX2. It's for STM32C series currently but I downloaded it to check it out. It looks very nice, that's for sure. Yet this topic is about file format. MX2 re-uses .ioc file extension but it's format is strange. It is made of JSON/Python?? multiline strings containing JSON and YAML. I don't understand what format is it exactly. The data inside it is also hard to understand and there is a lot of clutter, like IDs, URIs, URLs, descriptions, etc. Why on earth would somebody put field description text beside field name and value?If I may express may opinion - this is awful. It's even worse than old format. It won't be easy to merge changes in such file. It looks like it's a mash-up of multiple tools/libraries serialized states. CubeMX developers are going to have backward and forward compatibility problems and end users are going to suffer if bugs emerge.I would like to suggest one more file format: TOMLEdit: Moved from New IOC file f

SDMMC HAL driver implementation is full of timeouts like this:uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8U / 1000U); do { if (count-- == 0U) { return SDMMC_ERROR_TIMEOUT; } sta_reg = SDMMCx->STA; } while (SOME_FLAG_NOT_SET);It may work in a single-threaded application on some basic CPU which runs fixed clocks per cycle, but it's not accurate on CPUs with dual-issue pipeline. All preempting interrupts and in case RTOS is used, all higher priority tasks, prolong this timeout. And vice versa - the longer this timeout gets the more it blocks lower priority tasks and interrupts. And the timeout isn't even in microseconds to justify it. SDMMC_CMDTIMEOUT value is 5000 milliseconds (by the comment). It's bad implementation by any standard.It's been so for a long time in many STM32 series (F4, H7, H7RS, N6, etc.). It's reported at least 6 years ago: I may have encountered a bug in SDMMC_GetCmdResp1 ... - STMicroelectronics CommunityI didn't check all the post

Hey Team, Another day with a different problem.We have reached the point where we have to migrate to either XIP or LRUN in the life cycle of our project.We choose to do XIP and set up the External memories appropriately , For this workflow, we are using the the stm32N6DK, and  MX66UW1G45G_STM32N6570-DK.stldr for starters.We have set up the debug session as indicated in the  Getting started with STM32N6 MCUs in STM32CubeIDEAttached are theDebug logs from some of the debug sessions.The content of my linker scripts (FSBL) and (APPLI)Screen shoots of debug configurations . Spoiler (Highlight to read)Our debug sessions fail straight from the beginning as shown int the debug logs.Our debug sessions fail straight from the beginning as shown int the debug logs.Note:  At some point the debug session worked okay,Every time it worked I had not to have break points inserted in the application project.I am currently inclined to think the issue is with the IDE debu

My USB ECM project on NUCLEO-U575 and NUCLEO-U5A5 - it works now, on all OS platforms.https://github.com/tjaekel/STM32U5xx_USB_ECM This project and demo for a STM32U575I-EV (where I have converted from) needs a vendor driver on Windows.Windows does not support USB ECM (or USBLAN, just RNDIS, but it is different). There is not any driver to use USB ECM on Windows, except: Belcarra USBLAN demo driver.Dear STM Team:please, could you consider to license the Belcarra USBLAN driver for Windows?http://usblan.belcarra.com    http://www.belcarra.comIt would be nice, when STM (or AZURE RTOS - Microsoft), providing a demo for USB ECM, that it can be used also on a Windows OS host.Please, license such this driver and provide it together with CubeMX (and demos, HAL drivers). Thank you.Remark:In order to make it really correct working on all OS platforms (esp. Windows OS), a small fix in file "ux_device_descriptors.c" is needed (see the modification in the GitHub projec

I configured a nucleato-L152RE LED program using CubeMX6.17+STM32L1 Firmware Package V1.10.6 and found that the program kept restarting automatically. After adding the following code to the SystemInit() function generated by CubeMX, the problem was solved. What is the reason for this? And my other projects never need to include this line of code, such as F103, F411, G431, L051, and so on.SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET;

Are the pin configurations for TSV321RAILT and TSV321RILT exactly the same?I'm having trouble finding this information in the datasheet.

Hi I'm using STM32F411RET6 MCU. I tried to connect using the programmer to download the firmware, but there was an error as shown below, and the data cannot be read. 13:18:34 : UR connection mode is defined with the HWrst reset mode13:18:34 : ST-LINK SN : 54FF7106788056521117016713:18:34 : ST-LINK FW : V2J45S713:18:34 : Board : --13:18:34 : Voltage : 3.22V13:18:34 : SWD freq : 4000 KHz13:18:34 : Connect mode: Normal13:18:34 : Reset mode : Software reset13:18:34 : Device ID : 0x43113:18:34 : Revision ID : Rev A13:18:34 : Debug in Low Power mode is not supported for this device.13:18:34 : UPLOADING OPTION BYTES DATA ...13:18:34 : Bank : 0x0013:18:34 : Address : 0x40023c1413:18:34 : Size : 8 Bytes13:18:34 : UPLOADING ...13:18:34 : Size : 1024 Bytes13:18:34 : Address : 0x800000013:18:34 : Read progress:13:18:34 : Error: Data read failed After that, the firmware will not be downloaded, and the message core is locked up.I checked that it was a problem related to RDP, and it wa

We have successfully tested the  ST67W6X Network Driver CLI example on a NUCLEO-U575ZI-Q with X-NUCLEO-67W61M1 development boards.We would like to port the example to an STM32F746.However, this is not simple due to the tight timing constraints required by the ST67W6x - e.g. the examples utilise the advanced SPI DMA available in the STM32U5xx family.Searching the internet shows other developers noticing dropped data on other processors. There are also reports that the following requirements must be met:Respond within ~30us of SPI_RDY going highNo breaks of more than ~2-3us in the DMA while streaming the SPI data.Do you have an example port for the STM32F746? Or at least on a processor with similar limited DMA capabilities? 

I am working with the STM32N6-GettingStarted-ObjectDetection demo.  I found that doing a full chip erase wipes some bootloader code.  I was able to get my project going again by flashing the .hex file that came with the STM32N6-GettingStarted-ObjectDetection demo, the loading my code. Digging around on the net suggested that the prebuilt demo has a bootloader.  I have been unable to locate the bootloader.Can you provide me with the bootloader, preferably as a .hex file?

I have connected X-STM32MP-GNSS1 with my STM32MP157F-DK2 board. I have connected it directly to serial COM port on windows to use Teseo-suit. I updated the firmware for TESEO-LIV3FL to STA8090_4_6_15_1_CP_LIV3FL_UPG48 by using Teseo-suit. I still can not see my correct position on map. Can anybody please help? 

Hi ST Community,I am working on a project using the SensorTile.box Pro. My goal is to implement a highly accurate step counter using the LSM6DSV16X's embedded pedometer.What I have done:I recorded data patterns at 30Hz and successfully ran the Pedometer Regression Tool in MEMS Studio.The tool generated the optimum configuration files (pedometer.json ).I converted these register settings into a .ucf file format.The Problem: I need to apply these "Golden Settings" to the sensor initialization in AlgoBuilder so they persist after a reset. However, I am unable to find a standard method to load this configuration:I checked the Sensor Hub block properties, but I do not see a "Load Configuration/UCF" option.I searched the Library for a "Register Write" block to manually input the values, but this block seems missing or hidden in my version of AlgoBuilder (I only see Acceleration, FSM/MLC, Sensor Hub, etc. under the Sensor Hub folder).My Question: What is the correct way to inject a custom reg

Hi everyone,I am working on a project using BNO085 IMU sensor and STM32H7A3ZIT6Q. I have a single sensor working but stuck at 44Hz. The same sensor with SparkFun library on ESP32 achieves 1.2ms read time. I need help understanding why and how to match ESP32 performance on STM32.Hardware:NUCLEO-H7A3ZI-Q (STM32H7A3ZIT6Q, Cortex-M7 @ 280MHz)Adafruit BNO085 breakout boardI2C on PB8 (SCL), PB9 (SDA), PC0 (INT pin)P0 and P1 tied to GND (I2C mode, address 0x4A)Software:STM32CubeIDE with HALOfficial CEVA SH2 library from github.com/ceva-dsp/sh2REPORT_INTERVAL_US = 2500 (targeting 400Hz)SH2_ROTATION_VECTOR (9-axis full quaternion)STM32 performance achieved so far:I2C 400kHz polling: 28Hz, read_ms = 32msI2C 1MHz Fast Mode Plus: 44Hz, read_ms = 19msINT pin wait inside sh2_hal_read(): still 44Hz, read_ms = 19msESP32 performance with same sensor and SparkFun SH2 library:read time: 1.2msData rate: close to 400HzThis is a huge difference. 19ms on STM32 vs 1.2ms on ESP32 with the same SH2 library unde

Hi, I am using STM32U385CGU6 with 1.8V supply. My GSM peripheral using the 3.3V Uart port for a dedicated time (2sec) then turn back to 1.8V level of UART.  Could you offer 3.3V tolerant pin? I am using PA8 to communicate with GSM module. thank you & best regards, feramuz karşil 

When calling HAL_QSPI_Abort() to disable memory mapped mode, with the memmap timeout active, I find that there is a race condition that can cause the abort to fail when it should not. If the memmap timeout happens after the abort function's check of the busy flag, but before it can write to the abort bit, the TC flag will never be set and the abort function will wait for the configured qspi timeout, then return an error.I am testing this on a STM32F769I-DISCO board.I have found that the following patch will fix the issue: diff --git a/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.c b/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.c index 8404466..01a06ca 100644 --- a/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.c +++ b/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.c @@ -2381,19 +2381,19 @@ HAL_StatusTypeDef HAL_QSPI_Abort(QSPI_HandleTypeDef *hqspi) /* Configure QSPI: CR register with Abort request */ SET_BIT(hqspi->Instance->CR, QUADSPI_CR_ABOR

Heyho,using L073 at 32MHz, so even I2C transfers "seem" fast, at least in "fast mode plus" at SCL 1 MHz. And I don't want to over-use clock stretching.I'm looking for a way to use I2C slave receive with DMA, but an unknown transfer length.Right now it looks to me as if I could do the following:I2C & DMA prep: all stuff & addresses set, DMA in I2C enabledon I2C ADDR match interrupt:set DMA CNDTR to max buffer lengthenable DMA on I2C STOP match interrupt:disable DMAAny problems with that?Have only 1 device for now...Thanks!

One of my friends noticed, that ST NRND'd not only the STM8, but also the whole STM32L1xx family.However, in contrast to STM8, the 'L1 are under the 10-year commitment program, so they should continue to be available in the next 9 years. JW

Hi,I've have to port an existing huge application from F4 to a H753 board. The F4 has PNOR the H7 dual QSPI flash.One task parses XML configuration data from PNOR flash. A second task stores data e.g. log data in same PNOR.Parsing configuration data use of string functions which require a memory address, while writing to QSPI requires indirect mode. This would require kind of flash memory management, which I guess is bit tricky to handle.I started using indirect mode only and DMA to read chunks of data into memory buffers before parsing it. This works fine. A QSPI read request can suspend an ongoing erase operation, so it is not blocked or delayed. Great.But compared to the PNOR read, the latency when reading data chunks into buffers in indirect mode drops the data processing performance. Therefore I want to check if using memory mapped mode is worth some time spent for investigations.I've read that QSPI read has a prefetch buffer. Is this mechanism available for data read too or only

I've built at least a dozen boards using the same communication interface -- a custom debug monitor for communication through stlink -- all on stm32l42x processors. The debug monitor looks roughly like the following code. Although the macros are for ChibiOS, their purpose should be clear.Basically, the host software, after attaching to the debug interface, communicates by passing small commands through DCRDR and getting 32 bit results (which may be memory addresses) in DCRDR.  The DEMCR is used for triggering the monitor interrupt and the MON_REQ bit is used as a semaphore.  This has worked great until now.  I received prototypes of a new design.  Reading/writing of DCRDR works fine, but writes to DEMCR have no effect.  I can debug the code on the board with gdb, and I can write test code that triggers the monitor interface running on the board and even stop in the monitor with a breakpoint, but I don't seem to be able to write a value to DEMCR through stl

Dear All, Could you please share us a technical document to show us what was the exat meaning of "N" letter of your part BAT54CNFILM-H/J ? Actually we ordered 6K pcs of your part BAT54CFILM from Digikey and its Digikey part number is 497-3786-2-ND but received this part as its part number was written as BAT54CNFILM-H/J on the manufacturer label of this part and our customer needs to learn what is the meaning of "N" letter on this part number. So please provide us a document to explain this "N" letter as this informations is not available neither in digikey nor in its datasheet

Hi,I have few custom boards with STM32MP257 mostly running PTP related tasks. Once in a while (once in a few days of continuous run) I have noticed the following error in the dmesg (as it seems UART related - I have 4 UARTs enabled in the DT, while 3 of them have DMA enabled (the console one does not have the DMA enabled), but only one UART (other than console) is being used in the system for RX only):[251158.390476] Unable to handle kernel paging request at virtual address dead000000000108[251158.392934] Mem abort info:[251158.395854] ESR = 0x0000000096000044[251158.399679] EC = 0x25: DABT (current EL), IL = 32 bits[251158.405114] SET = 0, FnV = 0[251158.408235] EA = 0, S1PTW = 0[251158.411457] FSC = 0x04: level 0 translation fault[251158.416489] Data abort info:[251158.419408] ISV = 0, ISS = 0x00000044, ISS2 = 0x00000000[251158.425041] CM = 0, WnR = 1, TnD = 0, TagAccess = 0[251158.430173] GCS = 0, Overlay = 0, DirtyBit = 0, Xs = 0[251158.435607] [dead000000000108] address between us

Hello I've been using a STM32L073RZ-Nucleo with a X-NUCLEO-IOD02A1 to test some functions and it works great. But the thing I'm wondering is if its possible to also add X-NUCLEO-PLC01A1 expansion board while using X-NUCLEO-IOD02A1 at the same time.  What steps do i have to take take in software / hardware to make this function? I'm kind of a beginner so if you can just point me in the right direction to where I can find this information it would be very appreciated. Thank you!