STM32 MCUs

Say I am operating as master with CPOL=1.  Because the NSS pin seems to lag the enable bit (SPE) slightly, my logic analyzer always barfs on the first SPI packet because the clock is in the wrong state.So, I set the GPIO to have a pullup on the clock in CubeMX and the problem goes away - as soon as the init functions run, the clock goes high and stays that way until the first SPI transmit.  Also, the clock stays high after the end of the transfer if the SPI is disabled in the callback function.My only concern is for power consumption: It is obvious that the pullup gets applied when the SPI is disabled but I don't know is if the pullup applied all the time even when the alternate mode of the GPIO is set, i.e. is the pullup still applied at the pin when the SPI is enabled?  Do clock pulses during an SPI transaction work against the pullup? 

Hi everyone,I found a solution for a common issue when using the official STM32Cube for VS Code extension. If you disable the Microsoft C/C++ (ms-vscode.cpptools) extension to avoid IntelliSense conflicts, you might notice that "Format Document" stops working completely.The reason is that the STM32 extension's built-in clangd has its formatting engine disabled by default.To fix this:Go to VS Code Settings (Ctrl + ,).Search for: stm32cube-ide-clangd.enableFormatting.Check the box to enable it.If prompted, set "STM32Cube for VS Code" as your Default Formatter.This allows you to have working formatting and precise IntelliSense without any conflicts from the Microsoft extension. Hope this helps! 

I'm working on a design with an STM32L072CZT6TR, where I want to calibrate my main timebase. That main timebase is TIM6, which counts 16,000. The HSE is 16MHz, so there's an interrupt evey 1ms. Calibration is done by counting the number of HSE cycles between two consecutive PPS pulses from a GPS receiver. The PPS triggers an EXTI interrupt, which starts TIM21 and TIM22 at 0 on the first pulse, and reads the timer values on the second.TIM21 is set to count 16,000 pulses and TIM22 is slaved to TIM21. This way, I can conveniently determine whether the HSE is slow (TIM22 == 999) or fast (TIM22 == 1000), and calculate a correction based on TIM21.This logic is copied straight from an older design with an STM8, where it works like a charm. However, the cascading does not work. No matter what, TIM22 is always 0 on the second PPS. I have used CubeMX to set the timers up, and, going over the code with the reference manual as my guide, I can see no errors. Being a hardware engineer

Hardware & Setup- MCU: STM32H523RE (I3C target/slave mode) - Controller: STM32H533RE (I3C controller mode)- HAL Version: STM32CubeIDE 1.16.1, HAL for STM32H5- Bus Speed: 3.205 MHz I3C SDR Problem Description We're implementing an I3C target that needs to respond to random address reads with repeated start: [START][ADDR_W][0x01][RESTART][ADDR_R][DATA][STOP] Where:- ADDR_W writes the address byte (0x01) to tell the target which register to read- RESTART signals the repeated start- ADDR_R begins the read phase- Target should respond with data from address 0x01 The problem: Loading the TX FIFO in the RXFNE interrupt handler doesn't work. The hardware transmits stale data before the ISR can fill the TX FIFO with the requested data. 1. RXFNE interrupt fires when address byte (0x01) is received2. ISR starts executing (~1-2µs interrupt latency)3. ISR flushes TX FIFO and writes fresh data to TDR registers4. But hardware has already started transmitting from the (empty/stale) TX FIFO The I3C

Hello,I’ve recently started using ST products and the IDE with CubeMX, which is why I’m asking for your help. I’ve just begun developing a communication system using a Nucleo H743ZI2; my goal is to set up a UART and a CAN bus.The UART is done; I used DMA access to optimize it. However, when I try to enable the CAN bus in Cube MX, I run into a problem with the clock configuration related to the bus.When I use the “Resolve Clock Issues” function, I get the error: “Cannot find a solution for some constraints.” Does anyone have any ideas to help me solve this problem? Thank you in advance, and have a great day,

Hi,I have a question about choosing some fairly basic security settings for an STM32H5.We are developing a system that uses both G4 and H5 micros. We have developed a largely common bootloader that receives a signed encrypted application over variously USB, UART, or CAN, and flashes it to internal memory. This is working on the G4 and H5.For the G4, we understand that if we select "Level 1" read protection, the bootloader will still be able to erase and re-flash a new application but a user will not be able to gain access to the code (bootloader, application, or data in CC RAM). Further, the G4 can be reverted to Level 0 if required, but this will erase the proprietary code.Ideally, we would like the same security behaviour on the H5. I have been reading about the bewildering selection of security settings with privileged and secure settings for individual peripherals but I feel this is more complicated than we require. Our bootloader already prevents someone installing malicious code

Hi,I am using the latest version of STM32Cube extension for VS Code (3.8.0). I created a simple project for STM32H735G-DK board using CMake as the toolchain and ST-ARM-CLANG as the compiler. I do not know if it is relevant, but I also enabled FreeRTOS and configured the USE_NEWLIB_REENTRANT option to Enabled.I generated the project and I am compiling it with VSCode. I changed in the starm-clang.make to use the NEWLIB instead of the PICOLIBC:set(STARM_TOOLCHAIN_CONFIG "STARM_NEWLIB")The compilation works, but clangd complains about some errors. In the output of clangd, I can see multiple instances of:D:\ST\stm32cube\bundles\st-arm-clang\21.1.1+st.6\bin\..\lib\clang-runtimes\multilib.yaml:47:3: error: unknown key 'IncludeDirs' IncludeDirs: ^~~~~~~~~~~ D:\ST\stm32cube\bundles\st-arm-clang\21.1.1+st.6\bin\..\lib\clang-runtimes\multilib.yaml:21:1: error: multilib "arm-none-eabi/armv4t_exn_rtti_size" specifies undefined group name "stdlibs" MultilibVersion: '1.0' ^and because of these erro

Is it ok to use different build configuations for different pinout version?As you may have experienced, sometimes pcb version how the pinout. Sometimes another UART or TIMER is used in another pin etc,... Is it ok to  use different build configuations for different pinout version?

I am trying to run a ADC+DMA program inside application based program. (generated FSBL+Application project)While debugging the application project, it automatically jumps to somewhere else as shown in screenshot and is unable to debug the application one.The prgram is stucking at for loop which is not inside application code.

A few direct questions about the current CubeMX2/HAL2 split. Are older STM32 series expected to stay on HAL1 + CubeMX permanently, or is there an actual plan to migrate them to HAL2 + CubeMX2? What is the long-term support model here?Are these two stacks supposed to coexist for years, or is HAL1/CubeMX effectively going into maintenance mode? Is there any official migration guide planned?Both for HAL1 → HAL2 API migration and CubeMX project → CubeMX2 project migration. How is the VS Code extension supposed to work with both ecosystems in practice?If one project is on CubeMX/HAL1 and another is on CubeMX2/HAL2, what is the intended workflow?Is proper support planned for both, or is the tooling mainly targeting the new stack? Where is the actual HAL1 vs HAL2 side-by-side data?Flash usage, RAM usage, performance, code size, same project, same MCU class, comparable build settings. Right now this looks like a major ecosystem split without a clear migration plan or hard technical

Hi,I found the same issue as in.https://community.st.com/t5/stm32cubemx-mcus/found-a-bug-with-the-latest-rev-of-stm32cubemx-rev-5-3-0/td-p/279154(thank you @MSilv for reporting this btw).Since a STM32CubeMx update and STM32F4 Cube update, the generated main.c is missing two lines in the end of the generated void SystemClock_Config(void) function :LL_Init1msTick(100000000);LL_SYSTICK_SetClkSource(LL_SYSTICK_CLKSOURCE_HCLK);The update was quite a big leap :CubeMx: from 5.2.1 to 6.16.1STM32Cube FW_F4: from 1.24.1 to 1.28.3Without those lines the code is stuck.Adding them back in the user-code following SystemClock_Config(void) mitigates the issue, but it looks like those lines shouldn't have been deleted in the first place.

Typical bootloaders (including some of ST's built-in bootloaders for other processors) typically allow a code image to be loaded into the processor via some kind of serial link (UART, SPI, CAN, etc), without needing an ST-Link or other debug hardware. These make bootloaders ideal for in-field upgrades of products.OEMiROT/OEMuROT has some features of a bootloader, in that a new image can be placed in a special area of flash and (if it passes all the various checks) then be executed.However, there is no way of actually putting that image in flash without an ST-Link or similar, since this is needed to unlock the chip via the DA process. So if you want to do an in-field upgrade of your product's firmware without any debug hardware, OEMiROT in its current form isn't the solution.Our approach is for our application to download the image into a reserved area of RAM and then switch to the bootloader, where our adapted version of OEMiROT copies this image from RAM to the special area of flash.

I am trying to do multidrop with STM32WL5MOC and STM32U031. I have some issues:[1] When WL5MOC is the only active MCU in the circuit (U0 is not powered on) I cannot connect M4 core using TargetSel=0x04970041 option:I can connect to M0+ core using tagetsel (STM32_Programmer_CLI -c port=swd TargetSel=0x04970041 ap=1 mode=hotplug)If I try the same with ap=0, CLI cannot connect to M4 core and retires with ap=1 and then connects M0+ core againThere is no issue when not using targetsel option and U0 is disconnected. I can connect both WL5 cores with ap=0 and ap=1 options.[2] If I power on U0 and try multidrop, I cannot connect any of the cores of WL5:I can connect U0 with targetsel option(STM32_Programmer_CLI -c port=swd TargetSel=0x04590041 ap=0 mode=hotplug).. At first CLI cannot connect with ap=0 and retries with ap=1 and then connects.Interestginly If I try ap=1 directly, it cannot connect to U0 (STM32_Programmer_CLI -c port=swd TargetSel=0x04590041 ap=0 mode=hotplug)Am I missi

Hello All,I have the NUCLEO-C562RE board and I wanted to get started with it. But I am lost and not able to find any documentation related to architecture manual or user manual. I am new to ST boards, previously I used Aurix TC375. Has someone here in the community used this board or similar one and know how to work around it? It would be really helpful.Thanks

Recently I’ve been learning about the updated STM32 software ecosystem, including the new HAL2 library and STM32CubeMX 2 tool. I have a few practical questions and would like to start a discussion with all STM32 developers here.   What are the new characteristics, improvements and advantages of HAL2 compared with the traditional HAL library?   Can STM32CubeMX 2 still support earlier and older STM32 MCUs, or does it only serve the latest chip series?   For those legacy STM32 microcontrollers, are they able to use the new HAL2 library, or can they only run the classic HAL as before?   If you have relevant development experience or official information, welcome to share your views and explanations.    

Hi, We are using an STM32F103 as a controller for a Half-bridge dc-dc convertor running at 110Khz. We are facing an issue where the microcontroller is resetting every minute when output crosses 12A. We disconnected all peripherals, removed all protections and kept only the PWM and reset problem sustains itself. On further inspection, we found that the PWM duration increases for a few cycles and then the microcontroller resets. It seems to us that the microcontroller clock slows down and then finally stops forcing a reset. We do not have watchdog timer implemented.We are using a 8MHz crystal. Please check attached image (CH1 - reset line, CH2 - Independent PWM, CH3 - Half bridge high side) The fun fact is that if we place the microcontroller on an external PCB and connect to the gate driver with wires, we do not see the microcontroller resetting. (even without the crystal). Sometimes, attaching an oscilloscope probe (1Mohm) also prevents restart. Currently,

For STM32H7, if the FMC data lines and SDRAM data lines are cross-connected (not D0 to D0), and address lines are also cross-connected (not A0 to A0), can SDRAM work properly? My PCB is about to be manufactured, but due to the hardware engineer’s design, the SDRAM data lines and the MCU’s FMC data lines, as well as the SDRAM address lines and the MCU’s FMC address lines, are not connected one-to-one according to the CubeMX standard. Instead, the order has been shuffled. The actual wiring relationships are as follows: Data line connections: MCU FMC_D0 is connected to SDRAM_D13MCU FMC_D1 is connected to SDRAM_D14MCU FMC_D13 is connected to SDRAM_D1MCU FMC_D14 is connected to SDRAM_D0MCU FMC_D4 is connected to SDRAM_D7MCU FMC_D5 is connected to SDRAM_D6MCU FMC_D6 is connected to SDRAM_D5MCU FMC_D7 is connected to SDRAM_D4Address line connections: MCU FMC_A0 is connected to SDRAM_A2MCU FMC_A1 is connected to SDRAM_A3MCU FMC_A2 is connected to SDRAM_A0MCU FMC_A3 is connected to SDRAM_A1MCU

I have the following original debuggers:Stlink V2Stlink V3_SETStlink V3_MINIE (2 pieces)I was recently testing a simple board with an STM32U083 (powered by 3.3V) and found that two Stlink V3 MINIE units could connect to the MCU. Meanwhile, both the V2 and V3_SET work without any issues.I observed that after connecting (SWDIO,SWCLK,VDD,GND) to the powered MCU, both the V2 and V3_SET leave SWDIO at 3.3V (pull-up in the MCU) and SWCLK at 0V (pull-down in the MCU). Whereas the MINIE maintains a 3.3V level on both SWDIO and SWCLK. Out of curiosity, I connected an external 10k pull-down resistor to both SWDIO and SWCLK and observed that SWDIO drops (which is fine), but SWCLK does not, meaning that the Stlink V3 MINIE actively holds SWCLK at 3.3V. Am I doing something wrong, or are both MINIE boards defective?Best regards,Michal Dudka

  Device STM32WLE5 Clock configuration SYSCLK : MSI 16 MHz (MSIPLL mode Enabled)LSE : 32.768 kHz crystalLPTIM2 kernel clock : LSELow power mode : Sleep Observed behavior When configuring LPTIM2 with LSE clock, the following code sometimes blocks because the ARROK flag never sets. __HAL_LPTIM_AUTORELOAD_SET(&hlptim2, Period); while (!__HAL_LPTIM_GET_FLAG(&hlptim2, LPTIM_FLAG_ARROK)); This occurs after waking up from Sleep mode. Workaround Executing the following code before or after wake-up resolves the issue. RCC->BDCR |= RCC_BDCR_LSESYSEN; After writing LSESYSEN, the ARROK flag sets normally. Initialization code SystemClock_Config() already enables LSESYSEN. It is CubeMX provided.  LL_PWR_EnableBkUpAccess(); LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_MEDIUMLOW); LL_RCC_LSE_EnablePropagation(); LL_RCC_LSE_Enable(); while (LL_RCC_LSE_IsReady() != 1) { } LL_RCC_LSE_EnablePropagation() is defined as: __STATIC_INLINE void LL_RCC_LSE_EnablePropagation(void) { S

Hi Community, We are exploring the migration of our FreeRTOS-based firmware to Zephyr. Our current design heavily relies on TouchGFX (provided by ST) for controlling an 800×480 touch display. Here are some key details of our setup: TouchGFX with external SDRAM for a double frame buffer using the FMC peripheral Images, fonts, and text stored in external QSPI Flash LTDC controller in use DMA2D accelerator enabled RGB image compression utilized Is there any sample application or detailed documentation available for achieving this on Zephyr? I have already briefly reviewed the following resources: Abstraction Layer Architecture | TouchGFX Documentation and https://support.touchgfx.com/docs/basic-concepts/operating-system#touchgfx-os-wrappers However, I need more guidance, specifically: Examples or reference projects for TouchGFX on Zephyr Detailed documentation on integration steps We have a tig

Hi all,   in the release note of the STM32C5 family it is mentioned that the family will be supported with STM32CubeMX2. May I please ask when is it going to be available?    With best regards, Dmitry

How many uart channels are available on STM32H573I-DK Discovery kit.I am Looking for atleast two channels..Thanks in advance...

Run SimulatorGenerateDoneGenerate Assetsmake -f simulator/gcc/Makefile assets -j8generated/simulator/gcc/Makefile:221: recipe for target 'images' failedprocess_begin: CreateProcess(NULL, ../Middlewares/ST/touchgfx/framework/tools/imageconvert/build/win/imageconvert.out -r assets/images -w generated/images, ...) failed.make (e=2): 系统找不到指定的文件。make[1]: *** [images] Error 2simulator/gcc/Makefile:32: recipe for target 'assets' failedmake: *** [assets] Error 2FailedFailed

According to the PD 3.1 requirements (also PD 3.0), I need to connect UCPD1_CC1 and UCPD1_CC2 to USB-C CC1 and CC2 to communicate and request the desired voltage. But STM32G0B1KBU6  has only UCPD1_CC1 available. Is there any way to connect STM32G0B1KBU6  to USB-C to comply PD 3.1 requirements?

Hi everyone, I have a quick question regarding the upcoming release of CubeMX2 and its backward compatibility. Once CubeMX2 is released, will the older series before C5 (like the F4) support MX2 and HAL2? Also, if they do support it, will we be forced to bundle HAL2 for these older models, or will there be some flexibility? Thanks in advance for any insights or official clarification! Best,Leo